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Searched refs:regDP0_DP_VID_TIMING (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h9735 #define regDP0_DP_VID_TIMING … macro
H A Ddcn_3_1_5_offset.h9490 #define regDP0_DP_VID_TIMING … macro
H A Ddcn_3_1_4_offset.h9312 #define regDP0_DP_VID_TIMING … macro
H A Ddcn_3_2_1_offset.h8836 #define regDP0_DP_VID_TIMING … macro
H A Ddcn_3_2_0_offset.h8837 #define regDP0_DP_VID_TIMING … macro
H A Ddcn_3_1_6_offset.h9959 #define regDP0_DP_VID_TIMING … macro