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Searched refs:regDCPG_INTERRUPT_CONTROL_3 (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h867 #define regDCPG_INTERRUPT_CONTROL_3 … macro
H A Ddcn_3_1_4_offset.h1754 #define regDCPG_INTERRUPT_CONTROL_3 … macro
H A Ddcn_3_2_1_offset.h452 #define regDCPG_INTERRUPT_CONTROL_3 … macro
H A Ddcn_3_2_0_offset.h452 #define regDCPG_INTERRUPT_CONTROL_3 … macro
H A Ddcn_3_1_6_offset.h1071 #define regDCPG_INTERRUPT_CONTROL_3 … macro