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Searched refs:regDCCG_AUDIO_DTBCLK_DTO_PHASE (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h441 #define regDCCG_AUDIO_DTBCLK_DTO_PHASE … macro
H A Ddcn_3_1_5_offset.h230 #define regDCCG_AUDIO_DTBCLK_DTO_PHASE … macro
H A Ddcn_3_1_4_offset.h1537 #define regDCCG_AUDIO_DTBCLK_DTO_PHASE … macro
H A Ddcn_3_2_1_offset.h240 #define regDCCG_AUDIO_DTBCLK_DTO_PHASE … macro
H A Ddcn_3_2_0_offset.h240 #define regDCCG_AUDIO_DTBCLK_DTO_PHASE … macro
H A Ddcn_3_1_6_offset.h645 #define regDCCG_AUDIO_DTBCLK_DTO_PHASE … macro