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Searched refs:regD5VGA_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h1389 #define regD5VGA_CONTROL macro
H A Ddcn_3_1_5_offset.h1152 #define regD5VGA_CONTROL macro
H A Ddcn_3_1_4_offset.h1303 #define regD5VGA_CONTROL macro
H A Ddcn_3_2_1_offset.h1030 #define regD5VGA_CONTROL macro
H A Ddcn_3_2_0_offset.h1030 #define regD5VGA_CONTROL macro
H A Ddcn_3_1_6_offset.h1605 #define regD5VGA_CONTROL macro