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Searched refs:regCP_MQD_BASE_ADDR_HI (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v11_0.c835 WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi); in mes_v11_0_queue_init_register()
H A Dgfx_v9_4_3.c1642 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_MQD_BASE_ADDR_HI, in gfx_v9_4_3_xcc_kiq_init_register()
H A Dgfx_v11_0.c3916 WREG32_SOC15(GC, 0, regCP_MQD_BASE_ADDR_HI, in gfx_v11_0_kiq_init_register()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h695 #define regCP_MQD_BASE_ADDR_HI macro
H A Dgc_9_4_3_offset.h3284 #define regCP_MQD_BASE_ADDR_HI macro
H A Dgc_11_0_0_offset.h4602 #define regCP_MQD_BASE_ADDR_HI macro
H A Dgc_11_0_3_offset.h4826 #define regCP_MQD_BASE_ADDR_HI macro