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Searched refs:regCP_HQD_PQ_BASE_HI (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v11.c463 high == RREG32(SOC15_REG_OFFSET(GC, 0, regCP_HQD_PQ_BASE_HI))) in hqd_is_occupied_v11()
H A Dmes_v11_0.c844 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi); in mes_v11_0_queue_init_register()
H A Dgfx_v9_4_3.c1652 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_PQ_BASE_HI, in gfx_v9_4_3_xcc_kiq_init_register()
H A Dgfx_v11_0.c3926 WREG32_SOC15(GC, 0, regCP_HQD_PQ_BASE_HI, in gfx_v11_0_kiq_init_register()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h711 #define regCP_HQD_PQ_BASE_HI … macro
H A Dgc_9_4_3_offset.h3300 #define regCP_HQD_PQ_BASE_HI … macro
H A Dgc_11_0_0_offset.h4618 #define regCP_HQD_PQ_BASE_HI … macro
H A Dgc_11_0_3_offset.h4842 #define regCP_HQD_PQ_BASE_HI … macro