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Searched refs:regCP_HQD_IB_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c1581 tmp = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HQD_IB_CONTROL); in gfx_v9_4_3_xcc_mqd_init()
1741 WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), regCP_HQD_IB_CONTROL, 0); in gfx_v9_4_3_xcc_q_fini_register()
H A Dgfx_v11_0.c3855 tmp = RREG32_SOC15(GC, 0, regCP_HQD_IB_CONTROL); in gfx_v11_0_compute_mqd_init()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h733 #define regCP_HQD_IB_CONTROL macro
H A Dgc_9_4_3_offset.h3322 #define regCP_HQD_IB_CONTROL macro
H A Dgc_11_0_0_offset.h4640 #define regCP_HQD_IB_CONTROL macro
H A Dgc_11_0_3_offset.h4864 #define regCP_HQD_IB_CONTROL macro