Home
last modified time | relevance | path

Searched refs:regCM1_CM_MEM_PWR_STATUS2 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h5003 #define regCM1_CM_MEM_PWR_STATUS2 … macro
H A Ddcn_3_1_5_offset.h4762 #define regCM1_CM_MEM_PWR_STATUS2 … macro
H A Ddcn_3_1_4_offset.h5916 #define regCM1_CM_MEM_PWR_STATUS2 … macro
H A Ddcn_3_1_6_offset.h5223 #define regCM1_CM_MEM_PWR_STATUS2 … macro