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Searched refs:regCM1_CM_GAMCOR_RAMA_START_BASE_CNTL_G (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h4607 #define regCM1_CM_GAMCOR_RAMA_START_BASE_CNTL_G macro
H A Ddcn_3_1_5_offset.h4366 #define regCM1_CM_GAMCOR_RAMA_START_BASE_CNTL_G macro
H A Ddcn_3_1_4_offset.h5520 #define regCM1_CM_GAMCOR_RAMA_START_BASE_CNTL_G macro
H A Ddcn_3_2_1_offset.h3826 #define regCM1_CM_GAMCOR_RAMA_START_BASE_CNTL_G macro
H A Ddcn_3_2_0_offset.h3827 #define regCM1_CM_GAMCOR_RAMA_START_BASE_CNTL_G macro
H A Ddcn_3_1_6_offset.h4827 #define regCM1_CM_GAMCOR_RAMA_START_BASE_CNTL_G macro