Home
last modified time | relevance | path

Searched refs:regCM1_CM_GAMCOR_RAMA_OFFSET_B_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h4624 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h4383 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h5537 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h3843 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h3844 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h4844 #define regCM1_CM_GAMCOR_RAMA_OFFSET_B_BASE_IDX … macro