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Searched refs:regCM0_CM_GAMCOR_RAMA_END_CNTL1_G_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h3924 #define regCM0_CM_GAMCOR_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h3683 #define regCM0_CM_GAMCOR_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h4837 #define regCM0_CM_GAMCOR_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h3449 #define regCM0_CM_GAMCOR_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h3450 #define regCM0_CM_GAMCOR_RAMA_END_CNTL1_G_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h4144 #define regCM0_CM_GAMCOR_RAMA_END_CNTL1_G_BASE_IDX … macro