Home
last modified time | relevance | path

Searched refs:regCM0_CM_BLNDGAM_RAMA_END_CNTL1_G (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_2_offset.h4071 #define regCM0_CM_BLNDGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_1_5_offset.h3830 #define regCM0_CM_BLNDGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_1_4_offset.h4984 #define regCM0_CM_BLNDGAM_RAMA_END_CNTL1_G … macro
H A Ddcn_3_1_6_offset.h4291 #define regCM0_CM_BLNDGAM_RAMA_END_CNTL1_G … macro