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Searched refs:regBIF_BX_PF1_MAILBOX_MSGBUF_TRN_DW3_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_9_0_offset.h6817 #define regBIF_BX_PF1_MAILBOX_MSGBUF_TRN_DW3_BASE_IDX 8 macro
H A Dnbio_4_3_0_offset.h14453 #define regBIF_BX_PF1_MAILBOX_MSGBUF_TRN_DW3_BASE_IDX … macro
H A Dnbio_7_7_0_offset.h5719 #define regBIF_BX_PF1_MAILBOX_MSGBUF_TRN_DW3_BASE_IDX … macro
H A Dnbio_7_2_0_offset.h6515 #define regBIF_BX_PF1_MAILBOX_MSGBUF_TRN_DW3_BASE_IDX … macro