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/openbmc/linux/drivers/clk/
H A Dclk-versaclock7.c730 u64 refin_div, apll_rate; in vc7_get_apll_rate() local
741 refin_div = xtal_rate; in vc7_get_apll_rate()
743 refin_div = div64_u64(xtal_rate, vc7->clk_apll.xo_ib_h_div); in vc7_get_apll_rate()
746 refin_div *= 2; in vc7_get_apll_rate()
749 apll_rate = (refin_div * vc7->clk_apll.apll_fb_div_int) + in vc7_get_apll_rate()
750 ((refin_div * vc7->clk_apll.apll_fb_div_frac) >> VC7_APLL_DENOMINATOR_BITS); in vc7_get_apll_rate()
756 __func__, refin_div, apll_rate); in vc7_get_apll_rate()