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Searched refs:readb (Results 1 – 25 of 112) sorted by relevance

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/openbmc/u-boot/drivers/rtc/
H A Ds3c24x0_rtc.c32 writeb(readb(&rtc->rtccon) | 0x01, &rtc->rtccon); in SetRTC_Access()
36 writeb(readb(&rtc->rtccon) & ~0x01, &rtc->rtccon); in SetRTC_Access()
55 sec = readb(&rtc->bcdsec); in rtc_get()
56 min = readb(&rtc->bcdmin); in rtc_get()
57 hour = readb(&rtc->bcdhour); in rtc_get()
58 mday = readb(&rtc->bcddate); in rtc_get()
59 wday = readb(&rtc->bcdday); in rtc_get()
60 mon = readb(&rtc->bcdmon); in rtc_get()
61 year = readb(&rtc->bcdyear); in rtc_get()
62 } while (sec != readb(&rtc->bcdsec)); in rtc_get()
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/openbmc/qemu/tests/qtest/
H A Dtpm-tis-util.c55 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_localities()
82 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg()
89 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg()
97 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg()
116 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg_seize()
122 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg_seize()
130 access = readb(TIS_REG(l, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg_seize()
143 access = readb(TIS_REG(l, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg_seize()
154 access = readb(TIS_REG(locty, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg_seize()
163 access = readb(TIS_REG(l, TPM_TIS_REG_ACCESS)); in tpm_tis_test_check_access_reg_seize()
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H A Dvhost-user-blk-test.c134 status = readb(req_addr + 16 + sizeof(dwz_hdr2)); in test_invalid_discard_write_zeroes()
159 status = readb(req_addr + 16 + sizeof(dwz_hdr)); in test_invalid_discard_write_zeroes()
184 status = readb(req_addr + 16 + sizeof(dwz_hdr)); in test_invalid_discard_write_zeroes()
209 status = readb(req_addr + 16 + sizeof(dwz_hdr)); in test_invalid_discard_write_zeroes()
262 status = readb(req_addr + 528); in test_basic()
285 status = readb(req_addr + 528); in test_basic()
322 status = readb(req_addr + 16 + sizeof(dwz_hdr)); in test_basic()
345 status = readb(req_addr + 528); in test_basic()
383 status = readb(req_addr + 16 + sizeof(dwz_hdr)); in test_basic()
411 status = readb(req_addr + 528); in test_basic()
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H A Dvirtio-blk-test.c160 status = readb(req_addr + 528); in test_basic()
183 status = readb(req_addr + 528); in test_basic()
220 status = readb(req_addr + 16 + sizeof(dwz_hdr)); in test_basic()
243 status = readb(req_addr + 528); in test_basic()
277 status = readb(req_addr + 16 + sizeof(dwz_hdr)); in test_basic()
302 status = readb(req_addr + 528); in test_basic()
324 status = readb(req_addr + 528); in test_basic()
395 status = readb(req_addr + 528); in indirect()
420 status = readb(req_addr + 528); in indirect()
532 status = readb(req_addr + 528); in msix()
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/openbmc/u-boot/drivers/serial/
H A Dmcfuart.c102 while (!(readb(&uart->usr) & UART_USR_TXRDY)) in mcf_serial_putc()
113 while (!(readb(&uart->usr) & UART_USR_RXRDY)) in mcf_serial_getc()
116 return readb(&uart->urb); in mcf_serial_getc()
130 return readb(&uart->usr) & UART_USR_RXRDY; in mcf_serial_tstc()
172 if (!(readb(&uart->usr) & UART_USR_TXRDY)) in coldfire_serial_putc()
186 if (!(readb(&uart->usr) & UART_USR_RXRDY)) in coldfire_serial_getc()
189 return readb(&uart->urb); in coldfire_serial_getc()
208 return readb(&uart->usr) & UART_USR_RXRDY ? 1 : 0; in coldfire_serial_pending()
210 return readb(&uart->usr) & UART_USR_TXRDY ? 0 : 1; in coldfire_serial_pending()
H A Dserial_arc.c55 while (!(readb(&regs->status) & UART_TXEMPTY)) in arc_serial_putc()
65 return !(readb(&regs->status) & UART_RXEMPTY); in arc_serial_tstc()
72 uint32_t status = readb(&regs->status); in arc_serial_pending()
89 if (readb(&regs->status) & UART_OVERFLOW_ERR) in arc_serial_getc()
92 return readb(&regs->data) & 0xFF; in arc_serial_getc()
150 while (!(readb(&regs->status) & UART_TXEMPTY)) in _debug_uart_putc()
/openbmc/u-boot/arch/sh/cpu/sh2/
H A Dcpu.c14 writeb(readb(STBCR4) & ~0x04, STBCR4);\
17 writeb(readb(STBCR4) & ~0x80, STBCR4);\
20 writeb(readb(STBCR4) & ~0x10, STBCR4);\
/openbmc/u-boot/board/renesas/sh7785lcr/
H A Dselfcheck.c25 printf("PLD version = %04x\n", readb(PLD_VERSR)); in test_pld()
47 while (readb(PLD_SWSR) != 0x05) { in test_dipsw()
52 while (readb(PLD_SWSR) != 0x0A) { in test_dipsw()
/openbmc/u-boot/board/astro/mcf5373l/
H A Dmcf5373l.c150 if (readb(&uart->usr) & UART_USR_TXRDY) in astro_put_char()
163 return readb(&uart->usr) & UART_USR_RXRDY; in astro_is_char()
171 while (!(readb(&uart->usr) & UART_USR_RXRDY)) ; in astro_get_char()
172 return readb(&uart->urb); in astro_get_char()
H A Dfpga.c35 tmp_char = readb(&gpiop->par_timer); in altera_pre_fn()
81 if (readb(&gpiop->ppd_pwm) & 0x08) in altera_status_fn()
91 if (readb(&gpiop->ppd_pwm) & 0x20) in altera_done_fn()
223 return (readb(&gpiop->ppd_pwm) & 0x08) == 0; in xilinx_init_config_fn()
231 return (readb(&gpiop->ppd_pwm) & 0x20) >> 5; in xilinx_done_config_fn()
258 tmp_char = readb(&gpiop->par_timer); in xilinx_pre_config_fn()
/openbmc/phosphor-host-postd/
H A Dmain.cpp137 bool aspeedPCC(std::vector<uint8_t>& code, ssize_t readb) in aspeedPCC() argument
153 for (size_t i = 0; i < (readb / pccSize); i++) in aspeedPCC()
202 ssize_t readb; in PostCodeEventHandler() local
204 while ((readb = read(postFd, code.data(), codeSize)) > 0) in PostCodeEventHandler()
206 if (procPostCode && procPostCode(code, readb) == false) in PostCodeEventHandler()
239 if (readb < 0 && (errno == EAGAIN || errno == EWOULDBLOCK)) in PostCodeEventHandler()
245 if (readb == 0) in PostCodeEventHandler()
/openbmc/u-boot/arch/sh/lib/
H A Dtime.c33 writeb(readb(TMU_BASE + TSTR) & ~TSTR_STR0, TMU_BASE + TSTR); in timer_init()
34 writeb(readb(TMU_BASE + TSTR) | TSTR_STR0, TMU_BASE + TSTR); in timer_init()
/openbmc/u-boot/drivers/i2c/
H A Dfsl_i2c.c230 while (!(readb(&base->sr) & I2C_SR_MBB)) { in fsl_i2c_fixup()
235 if (readb(&base->sr) & I2C_SR_MAL) { in fsl_i2c_fixup()
243 readb(&base->dr); in fsl_i2c_fixup()
246 while (!(readb(&base->sr) & I2C_SR_MIF)) { in fsl_i2c_fixup()
281 while (readb(&base->sr) & I2C_SR_MBB) { in __i2c_init()
298 while (readb(&base->sr) & I2C_SR_MBB) { in i2c_wait4bus()
313 csr = readb(&base->sr); in i2c_wait()
317 csr = readb(&base->sr); in i2c_wait()
382 readb(&base->dr); in __i2c_read_data()
398 data[i] = readb(&base->dr); in __i2c_read_data()
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H A Dmxc_i2c.c202 sr = readb(base + (I2SR << reg_shift)); in wait_for_sr_state()
211 __func__, sr, readb(base + (I2CR << reg_shift)), in wait_for_sr_state()
223 sr, readb(base + (I2CR << reg_shift)), state); in wait_for_sr_state()
263 unsigned int temp = readb(base + (I2CR << reg_shift)); in i2c_imx_stop()
290 ret = readb(base + (I2CR << reg_shift)) & I2CR_IDIS; in i2c_init_transfer_()
292 ret = !(readb(base + (I2CR << reg_shift)) & I2CR_IEN); in i2c_init_transfer_()
300 if (readb(base + (IADR << reg_shift)) == (chip << 1)) in i2c_init_transfer_()
308 temp = readb(base + (I2CR << reg_shift)); in i2c_init_transfer_()
483 temp = readb(base + (I2CR << reg_shift)); in i2c_read_data()
490 readb(base + (I2DR << reg_shift)); in i2c_read_data()
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H A Dxilinx_xiic.c120 bytes_in_fifo = readb(priv->base + XIIC_RFO_REG_OFFSET) + 1; in xiic_read_rx()
126 msg->buf[pos++] = readb(priv->base + in xiic_read_rx()
137 return IIC_TX_FIFO_DEPTH - readb(priv->base + XIIC_TFO_REG_OFFSET) - 1; in xiic_tx_fifo_space()
239 for (sr = readb(priv->base + XIIC_SR_REG_OFFSET); in xiic_clear_rx_fifo()
241 sr = readb(priv->base + XIIC_SR_REG_OFFSET)) in xiic_clear_rx_fifo()
242 readb(priv->base + XIIC_DRR_REG_OFFSET); in xiic_clear_rx_fifo()
H A Dsh_i2c.c72 if (SH_IC_DTE & readb(&dev->icsr)) in sh_irq_dte()
83 if (SH_IC_DTE & readb(&dev->icsr)) in sh_irq_dte_with_tack()
85 if (SH_IC_TACK & readb(&dev->icsr)) in sh_irq_dte_with_tack()
97 if (!(SH_IC_BUSY & readb(&dev->icsr))) in sh_irq_busy()
192 ret = readb(&dev->icdr) & 0xff; in sh_i2c_raw_read()
195 readb(&dev->icdr); /* Dummy read */ in sh_i2c_raw_read()
H A Drcar_iic.c52 if (RCAR_IC_DTE & readb(priv->base + RCAR_IIC_ICSR)) in sh_irq_dte()
65 icsr = readb(priv->base + RCAR_IIC_ICSR); in sh_irq_dte_with_tack()
81 if (!(RCAR_IC_BUSY & readb(priv->base + RCAR_IIC_ICSR))) in sh_irq_busy()
132 msg->buf[i] = readb(priv->base + RCAR_IIC_ICDR) & 0xff; in rcar_iic_read_common()
/openbmc/u-boot/drivers/usb/musb/
H A Dmusb_udc.c110 b = readb(&musbr->faddr); in musb_db_regs()
113 b = readb(&musbr->power); in musb_db_regs()
119 b = readb(&musbr->devctl); in musb_db_regs()
122 b = readb(&musbr->ep[0].ep0.configdata); in musb_db_regs()
128 b = readb(&musbr->index); in musb_db_regs()
152 power = readb(&musbr->power); in musb_peri_softconnect()
157 readb(&musbr->intrusb); in musb_peri_softconnect()
164 power = readb(&musbr->power); in musb_peri_softconnect()
174 devctl = readb(&musbr->devctl); in musb_peri_softconnect()
258 faddr = readb(&musbr->faddr); in musb_peri_ep0_set_address()
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/openbmc/u-boot/drivers/gpio/
H A Dhi6220_gpio.c18 data = readb(bank->base + HI6220_GPIO_DIR); in hi6220_gpio_direction_input()
40 data = readb(bank->base + HI6220_GPIO_DIR); in hi6220_gpio_direction_output()
53 return !!readb(bank->base + (BIT(gpio + 2))); in hi6220_gpio_get_value()
/openbmc/u-boot/arch/arm/mach-omap2/omap3/
H A Dspl_id_nand.c52 *mfr = readb(&gpmc_cfg->cs[0].nand_dat); in identify_nand_chip()
53 *id = readb(&gpmc_cfg->cs[0].nand_dat); in identify_nand_chip()
/openbmc/u-boot/cmd/
H A Dpcmcia.c333 …printf("Configuration Option Register: %02x @ %x\n", readb(addr + config_base), addr + config_base… in check_ide_device()
334 printf("Card Configuration and Status Register: %02x\n", readb(addr + config_base + 2)); in check_ide_device()
335 printf("Pin Replacement Register Register: %02x\n", readb(addr + config_base + 4)); in check_ide_device()
336 printf("Socket and Copy Register: %02x\n", readb(addr + config_base + 6)); in check_ide_device()
/openbmc/u-boot/arch/microblaze/include/asm/
H A Dio.h24 #define readb(addr) \ macro
46 #define inb(addr) readb(addr)
54 #define in_8(addr) readb(addr)
71 #define __raw_readb readb
/openbmc/u-boot/drivers/net/
H A Dcs8900.c56 readb(iob); in get_reg_init_bus()
57 readb(iob + 1); in get_reg_init_bus()
58 readb(iob); in get_reg_init_bus()
59 readb(iob + 1); in get_reg_init_bus()
60 readb(iob); in get_reg_init_bus()
/openbmc/u-boot/arch/xtensa/include/asm/
H A Dio.h35 #define readb(addr) \ macro
45 #define __raw_readb readb
59 #define inb(port) readb((u8 *)((port)))
/openbmc/u-boot/include/
H A Diotrace.h60 #undef readb
61 #define readb(addr) iotrace_readb((const void *)(uintptr_t)addr) macro

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