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Searched refs:radeon_get_ib_value (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/radeon/
H A Dr600_cs.c883 header = radeon_get_ib_value(p, h_idx); in r600_cs_common_vline_parse()
1494 word0 = radeon_get_ib_value(p, idx + 0); in r600_check_texture_resource()
1501 word1 = radeon_get_ib_value(p, idx + 1); in r600_check_texture_resource()
1504 word4 = radeon_get_ib_value(p, idx + 4); in r600_check_texture_resource()
1505 word5 = radeon_get_ib_value(p, idx + 5); in r600_check_texture_resource()
1641 idx_value = radeon_get_ib_value(p, idx); in r600_packet3_check()
1655 tmp = radeon_get_ib_value(p, idx + 1); in r600_packet3_check()
1803 tmp = radeon_get_ib_value(p, idx) + in r600_packet3_check()
1833 tmp = radeon_get_ib_value(p, idx+2) + in r600_packet3_check()
2189 offset = radeon_get_ib_value(p, idx+0); in r600_packet3_check()
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H A Devergreen_cs.c1786 idx_value = radeon_get_ib_value(p, idx); in evergreen_packet3_check()
1800 tmp = radeon_get_ib_value(p, idx + 1); in evergreen_packet3_check()
1928 radeon_get_ib_value(p, idx+1) + in evergreen_packet3_check()
2119 command = radeon_get_ib_value(p, idx+4); in evergreen_packet3_check()
2121 info = radeon_get_ib_value(p, idx+1); in evergreen_packet3_check()
2154 tmp = radeon_get_ib_value(p, idx) + in evergreen_packet3_check()
2192 tmp = radeon_get_ib_value(p, idx+2) + in evergreen_packet3_check()
2497 offset = radeon_get_ib_value(p, idx+1); in evergreen_packet3_check()
2516 offset = radeon_get_ib_value(p, idx+3); in evergreen_packet3_check()
2541 offset = radeon_get_ib_value(p, idx+0); in evergreen_packet3_check()
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H A Dradeon_vce.c478 offset = radeon_get_ib_value(p, lo); in radeon_vce_cs_reloc()
479 idx = radeon_get_ib_value(p, hi); in radeon_vce_cs_reloc()
565 uint32_t len = radeon_get_ib_value(p, p->idx); in radeon_vce_cs_parse()
566 uint32_t cmd = radeon_get_ib_value(p, p->idx + 1); in radeon_vce_cs_parse()
582 handle = radeon_get_ib_value(p, p->idx + 2); in radeon_vce_cs_parse()
601 *size = radeon_get_ib_value(p, p->idx + 8) * in radeon_vce_cs_parse()
602 radeon_get_ib_value(p, p->idx + 10) * in radeon_vce_cs_parse()
638 tmp = radeon_get_ib_value(p, p->idx + 4); in radeon_vce_cs_parse()
H A Dr300.c639 idx_value = radeon_get_ib_value(p, idx); in r300_packet0_check()
1196 ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->gpu_offset); in r300_packet3_check()
1207 if (((radeon_get_ib_value(p, idx + 1) >> 4) & 0x3) != 3) { in r300_packet3_check()
1211 track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); in r300_packet3_check()
1222 if (((radeon_get_ib_value(p, idx) >> 4) & 0x3) != 3) { in r300_packet3_check()
1226 track->vap_vf_cntl = radeon_get_ib_value(p, idx); in r300_packet3_check()
1234 track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); in r300_packet3_check()
1241 track->vap_vf_cntl = radeon_get_ib_value(p, idx); in r300_packet3_check()
1248 track->vap_vf_cntl = radeon_get_ib_value(p, idx + 1); in r300_packet3_check()
1255 track->vap_vf_cntl = radeon_get_ib_value(p, idx); in r300_packet3_check()
H A Dr100.c1286 value = radeon_get_ib_value(p, idx); in r100_reloc_pitch_offset()
1322 c = radeon_get_ib_value(p, idx++) & 0x1F; in r100_packet3_load_vbpntr()
1338 idx_value = radeon_get_ib_value(p, idx); in r100_packet3_load_vbpntr()
1364 idx_value = radeon_get_ib_value(p, idx); in r100_packet3_load_vbpntr()
1470 header = radeon_get_ib_value(p, h_idx); in r100_cs_packet_parse_vline()
1471 crtc_id = radeon_get_ib_value(p, h_idx + 5); in r100_cs_packet_parse_vline()
1575 idx_value = radeon_get_ib_value(p, idx); in r100_packet0_check()
1907 value = radeon_get_ib_value(p, idx + 2); in r100_cs_track_check_pkt3_indx_buffer()
1964 track->max_indx = radeon_get_ib_value(p, idx+1); in r100_packet3_check()
1990 track->vap_vf_cntl = radeon_get_ib_value(p, idx); in r100_packet3_check()
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H A Dradeon_cs.c756 header = radeon_get_ib_value(p, idx); in radeon_cs_packet_parse()
792 printk("\t0x%08x <---\n", radeon_get_ib_value(p, i)); in radeon_cs_packet_parse()
794 printk("\t0x%08x\n", radeon_get_ib_value(p, i)); in radeon_cs_packet_parse()
875 idx = radeon_get_ib_value(p, p3reloc.idx + 1); in radeon_cs_packet_next_reloc()
H A Dradeon_uvd.c573 offset = radeon_get_ib_value(p, data0); in radeon_uvd_cs_reloc()
574 idx = radeon_get_ib_value(p, data1); in radeon_uvd_cs_reloc()
589 cmd = radeon_get_ib_value(p, p->idx) >> 1; in radeon_uvd_cs_reloc()
H A Dr200.c161 idx_value = radeon_get_ib_value(p, idx); in r200_packet0_check()
H A Dradeon.h1050 static inline u32 radeon_get_ib_value(struct radeon_cs_parser *p, int idx) in radeon_get_ib_value() function