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Searched refs:qpci_io_readw (Results 1 – 10 of 10) sorted by relevance

/openbmc/qemu/tests/qtest/
H A Dtco-test.c88 val = qpci_io_readw(d->dev, d->tco_io_bar, TCO1_CNT); in stop_tco()
97 val = qpci_io_readw(d->dev, d->tco_io_bar, TCO1_CNT); in start_tco()
139 g_assert_cmpint(qpci_io_readw(d.dev, d.tco_io_bar, TCO_RLD), ==, in test_tco_defaults()
142 g_assert_cmpint(qpci_io_readw(d.dev, d.tco_io_bar, TCO_DAT_IN), ==, in test_tco_defaults()
151 g_assert_cmpint(qpci_io_readw(d.dev, d.tco_io_bar, TCO_MESSAGE1), ==, in test_tco_defaults()
157 g_assert_cmpint(qpci_io_readw(d.dev, d.tco_io_bar, TCO_TMR), ==, in test_tco_defaults()
182 val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS); in test_tco_timeout()
189 val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS); in test_tco_timeout()
195 val = qpci_io_readw(d.dev, d.tco_io_bar, TCO1_STS); in test_tco_timeout()
198 val = qpci_io_readw(d.dev, d.tco_io_bar, TCO2_STS); in test_tco_timeout()
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H A Dnvme-test.c61 g_assert_cmpint(qpci_io_readw(pdev, bar, 0), ==, 0xaa99); in nvmetest_oob_cmb_test()
66 g_assert_cmpint(qpci_io_readw(pdev, bar, cmb_bar_size - 1), !=, 0x2211); in nvmetest_oob_cmb_test()
107 g_assert_cmpint(qpci_io_readw(pdev, pmr_bar, 0), !=, 0xaa99); in nvmetest_pmr_reg_test()
124 g_assert_cmpint(qpci_io_readw(pdev, pmr_bar, 0), ==, 0x2211); in nvmetest_pmr_reg_test()
135 g_assert_cmpint(qpci_io_readw(pdev, pmr_bar, 0), !=, 0x6655); in nvmetest_pmr_reg_test()
H A Dusb-hcd-ehci-test.c32 value = qpci_io_readw(hc->dev, addr);
H A Dide-test.c636 buf[i] = qpci_io_readw(dev, ide_bar, reg_data); in test_identify()
1015 rx[offset + j] = cpu_to_le16(qpci_io_readw(dev, ide_bar, in cdrom_pio_impl()
/openbmc/qemu/tests/qtest/libqos/
H A Dvirtio-pci-modern.c25 return qpci_io_readw(dev->pdev, dev->bar, dev->device_cfg_offset + addr); in config_readw()
198 return qpci_io_readw(dev->pdev, dev->bar, dev->common_cfg_offset + in get_queue_size()
239 notify_off = qpci_io_readw(dev->pdev, dev->bar, dev->common_cfg_offset + in virtqueue_setup()
286 vector = qpci_io_readw(d->pdev, d->bar, d->common_cfg_offset + in set_config_vector()
301 vector = qpci_io_readw(d->pdev, d->bar, d->common_cfg_offset + in set_queue_vector()
H A Dvirtio-pci.c60 value = qpci_io_readw(dev->pdev, dev->bar, CONFIG_BASE(dev) + off); in qvirtio_pci_config_readw()
192 return qpci_io_readw(dev->pdev, dev->bar, VIRTIO_PCI_QUEUE_NUM); in qvirtio_pci_get_queue_size()
283 vector = qpci_io_readw(d->pdev, d->bar, VIRTIO_MSI_CONFIG_VECTOR); in qvirtio_pci_set_config_vector()
294 vector = qpci_io_readw(d->pdev, d->bar, VIRTIO_MSI_QUEUE_VECTOR); in qvirtio_pci_set_queue_vector()
H A Dusb.c34 uint16_t value = qpci_io_readw(hc->dev, hc->bar, 0x10 + 2 * port); in uhci_port_test()
H A Dsdhci.c83 return qpci_io_readw(&spci->dev, spci->mem_bar, reg); in sdhci_pci_readw()
H A Dpci.h106 uint16_t qpci_io_readw(QPCIDevice *dev, QPCIBar token, uint64_t off);
H A Dpci.c413 uint16_t qpci_io_readw(QPCIDevice *dev, QPCIBar token, uint64_t off) in qpci_io_readw() function