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Searched refs:pwr_base (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/clk/bcm/
H A Dclk-iproc-pll.c65 void __iomem *pwr_base; member
192 if (pll->pwr_base) { in __pll_disable()
194 val = readl(pll->pwr_base + ctrl->aon.offset); in __pll_disable()
196 iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val); in __pll_disable()
200 iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val); in __pll_disable()
215 if (pll->pwr_base) { in __pll_enable()
217 val = readl(pll->pwr_base + ctrl->aon.offset); in __pll_enable()
220 iproc_pll_write(pll, pll->pwr_base, ctrl->aon.offset, val); in __pll_enable()
752 pll->pwr_base = of_iomap(node, 1); in iproc_pll_clk_setup()
850 if (pll->pwr_base) in iproc_pll_clk_setup()
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/openbmc/u-boot/drivers/clk/
H A Dclk_stm32h7.c349 uint8_t *pwr_base = (uint8_t *)regmap_get_range(priv->pwr_regmap, 0); in configure_clocks() local
368 clrsetbits_le32(pwr_base + PWR_D3CR, PWR_D3CR_VOS_MASK, in configure_clocks()
371 clrbits_le32(pwr_base + PWR_CR3, PWR_CR3_SCUEN); in configure_clocks()
372 while (!(readl(pwr_base + PWR_D3CR) & PWR_D3CR_VOSREADY)) in configure_clocks()
/openbmc/linux/drivers/net/wireless/realtek/rtw88/
H A Dphy.h147 u8 pwr_base; member
H A Dphy.c2102 u8 *base = &pwr_param->pwr_base; in rtw_get_tx_power_params()
2144 tx_power = pwr_param.pwr_base; in rtw_phy_get_tx_power_index()
H A Ddebug.c694 pwr_param.pwr_base, in rtw_debugfs_get_tx_pwr_tbl()