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Searched refs:pwm_ctrl (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/video/backlight/
H A Dlm3630a_bl.c93 rval |= lm3630a_update(pchip, REG_CONFIG, 0x07, pdata->pwm_ctrl); in lm3630a_chip_init()
191 enum lm3630a_pwm_ctrl pwm_ctrl = pchip->pdata->pwm_ctrl; in lm3630a_bank_a_update_status() local
194 if ((pwm_ctrl & LM3630A_PWM_BANK_A) != 0) in lm3630a_bank_a_update_status()
225 enum lm3630a_pwm_ctrl pwm_ctrl = pchip->pdata->pwm_ctrl; in lm3630a_bank_a_get_brightness() local
227 if ((pwm_ctrl & LM3630A_PWM_BANK_A) != 0) { in lm3630a_bank_a_get_brightness()
265 enum lm3630a_pwm_ctrl pwm_ctrl = pchip->pdata->pwm_ctrl; in lm3630a_bank_b_update_status() local
268 if ((pwm_ctrl & LM3630A_PWM_BANK_B) != 0) in lm3630a_bank_b_update_status()
299 enum lm3630a_pwm_ctrl pwm_ctrl = pchip->pdata->pwm_ctrl; in lm3630a_bank_b_get_brightness() local
301 if ((pwm_ctrl & LM3630A_PWM_BANK_B) != 0) { in lm3630a_bank_b_get_brightness()
559 if (pdata->pwm_ctrl != LM3630A_PWM_DISABLE) { in lm3630a_probe()
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
H A Dfantog.c84 if (therm->func->pwm_ctrl) in nvkm_fantog_set()
85 therm->func->pwm_ctrl(therm, fan->func.line, false); in nvkm_fantog_set()
96 if (therm->func->pwm_ctrl) { in nvkm_fantog_create()
97 ret = therm->func->pwm_ctrl(therm, func->line, false); in nvkm_fantog_create()
H A Dfanpwm.c80 ret = therm->func->pwm_ctrl(therm, fan->func.line, true); in nvkm_fanpwm_set()
96 !therm->func->pwm_ctrl || info.type == NVBIOS_THERM_FAN_TOGGLE || in nvkm_fanpwm_create()
H A Dgm107.c61 .pwm_ctrl = gm107_fan_pwm_ctrl,
H A Dgt215.c61 .pwm_ctrl = nv50_fan_pwm_ctrl,
H A Dpriv.h89 int (*pwm_ctrl)(struct nvkm_therm *, int line, bool); member
H A Dgk104.c96 .pwm_ctrl = gf119_fan_pwm_ctrl,
H A Dgf119.c140 .pwm_ctrl = gf119_fan_pwm_ctrl,
H A Dnv50.c163 .pwm_ctrl = nv50_fan_pwm_ctrl,
H A Dnv40.c192 .pwm_ctrl = nv40_fan_pwm_ctrl,
H A Dg84.c217 .pwm_ctrl = nv50_fan_pwm_ctrl,
/openbmc/linux/include/linux/platform_data/
H A Dlm3630a_bl.h62 enum lm3630a_pwm_ctrl pwm_ctrl; member
/openbmc/linux/drivers/net/can/
H A Dkvaser_pciefd.c632 u32 pwm_ctrl; in kvaser_pciefd_pwm_stop() local
636 pwm_ctrl = ioread32(can->reg_base + KVASER_PCIEFD_KCAN_PWM_REG); in kvaser_pciefd_pwm_stop()
637 top = FIELD_GET(KVASER_PCIEFD_KCAN_PWM_TOP_MASK, pwm_ctrl); in kvaser_pciefd_pwm_stop()
639 pwm_ctrl |= FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TRIGGER_MASK, top); in kvaser_pciefd_pwm_stop()
640 iowrite32(pwm_ctrl, can->reg_base + KVASER_PCIEFD_KCAN_PWM_REG); in kvaser_pciefd_pwm_stop()
647 u32 pwm_ctrl; in kvaser_pciefd_pwm_start() local
655 pwm_ctrl = FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TRIGGER_MASK, top); in kvaser_pciefd_pwm_start()
656 pwm_ctrl |= FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TOP_MASK, top); in kvaser_pciefd_pwm_start()
657 iowrite32(pwm_ctrl, can->reg_base + KVASER_PCIEFD_KCAN_PWM_REG); in kvaser_pciefd_pwm_start()
661 pwm_ctrl = FIELD_PREP(KVASER_PCIEFD_KCAN_PWM_TRIGGER_MASK, trigger); in kvaser_pciefd_pwm_start()
[all …]
/openbmc/linux/drivers/hwmon/
H A Dit87.c624 u8 pwm_ctrl[NUM_PWM]; /* Register value */ member
799 data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]); in it87_update_pwm_ctrl()
801 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; in it87_update_pwm_ctrl()
805 if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ in it87_update_pwm_ctrl()
806 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03; in it87_update_pwm_ctrl()
808 data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f; in it87_update_pwm_ctrl()
1298 if (data->pwm_ctrl[nr] & 0x80) in pwm_mode()
1555 ctrl = (data->pwm_ctrl[nr] & 0x7c) | in set_pwm_enable()
1560 data->pwm_ctrl[nr] = ctrl; in set_pwm_enable()
1567 ctrl = (data->pwm_ctrl[nr] & 0x7c) | in set_pwm_enable()
[all …]
/openbmc/u-boot/arch/m68k/include/asm/coldfire/
H A Dpwm.h13 typedef struct pwm_ctrl { struct
/openbmc/u-boot/arch/m68k/include/asm/
H A Dimmap_5301x.h99 typedef struct pwm_ctrl { struct
/openbmc/linux/drivers/gpu/drm/gma500/
H A Dcdv_intel_dp.c2017 u32 pwm_ctrl; in cdv_intel_dp_init() local
2025 pwm_ctrl = REG_READ(BLC_PWM_CTL2); in cdv_intel_dp_init()
2026 pwm_ctrl |= PWM_PIPE_B; in cdv_intel_dp_init()
2027 REG_WRITE(BLC_PWM_CTL2, pwm_ctrl); in cdv_intel_dp_init()