/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
H A D | g84.c | 111 u32 flags = 0, ptr0, save; in g84_ectx_bind() local 114 case NVKM_ENGINE_GR : ptr0 = 0x0020; break; in g84_ectx_bind() 116 case NVKM_ENGINE_MSPDEC: ptr0 = 0x0040; break; in g84_ectx_bind() 118 case NVKM_ENGINE_MSPPP : ptr0 = 0x0060; break; in g84_ectx_bind() 120 case NVKM_ENGINE_MSVLD : ptr0 = 0x0080; break; in g84_ectx_bind() 122 case NVKM_ENGINE_SEC : ptr0 = 0x00a0; break; in g84_ectx_bind() 123 case NVKM_ENGINE_CE : ptr0 = 0x00c0; break; in g84_ectx_bind() 144 nvkm_wo32(chan->eng, ptr0 + 0x00, flags); in g84_ectx_bind() 145 nvkm_wo32(chan->eng, ptr0 + 0x04, lower_32_bits(limit)); in g84_ectx_bind() 149 nvkm_wo32(chan->eng, ptr0 + 0x10, 0x00000000); in g84_ectx_bind() [all …]
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H A D | nv50.c | 155 u32 flags = 0, ptr0, save; in nv50_ectx_bind() local 158 case NVKM_ENGINE_GR : ptr0 = 0x0000; break; in nv50_ectx_bind() 159 case NVKM_ENGINE_MPEG : ptr0 = 0x0060; break; in nv50_ectx_bind() 194 nvkm_wo32(chan->eng, ptr0 + 0x00, flags); in nv50_ectx_bind() 195 nvkm_wo32(chan->eng, ptr0 + 0x04, lower_32_bits(limit)); in nv50_ectx_bind() 196 nvkm_wo32(chan->eng, ptr0 + 0x08, lower_32_bits(start)); in nv50_ectx_bind() 197 nvkm_wo32(chan->eng, ptr0 + 0x0c, upper_32_bits(limit) << 24 | in nv50_ectx_bind() 199 nvkm_wo32(chan->eng, ptr0 + 0x10, 0x00000000); in nv50_ectx_bind() 200 nvkm_wo32(chan->eng, ptr0 + 0x14, 0x00000000); in nv50_ectx_bind()
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H A D | gk104.c | 136 u32 ptr0, ptr1 = 0; in gk104_ectx_bind() local 141 case NVKM_ENGINE_GR : ptr0 = 0x0210; break; in gk104_ectx_bind() 142 case NVKM_ENGINE_SEC : ptr0 = 0x0220; break; in gk104_ectx_bind() 143 case NVKM_ENGINE_MSPDEC: ptr0 = 0x0250; break; in gk104_ectx_bind() 144 case NVKM_ENGINE_MSPPP : ptr0 = 0x0260; break; in gk104_ectx_bind() 145 case NVKM_ENGINE_MSVLD : ptr0 = 0x0270; break; in gk104_ectx_bind() 146 case NVKM_ENGINE_VIC : ptr0 = 0x0280; break; in gk104_ectx_bind() 147 case NVKM_ENGINE_MSENC : ptr0 = 0x0290; break; in gk104_ectx_bind() 150 ptr0 = 0x0210; in gk104_ectx_bind() 155 ptr0 = 0x0210; in gk104_ectx_bind() [all …]
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H A D | gf100.c | 164 u32 ptr0; in gf100_ectx_bind() local 168 case NVKM_ENGINE_GR : ptr0 = 0x0210; break; in gf100_ectx_bind() 169 case NVKM_ENGINE_CE : ptr0 = 0x0230 + (engn->engine->subdev.inst * 0x10); break; in gf100_ectx_bind() 170 case NVKM_ENGINE_MSPDEC: ptr0 = 0x0250; break; in gf100_ectx_bind() 171 case NVKM_ENGINE_MSPPP : ptr0 = 0x0260; break; in gf100_ectx_bind() 172 case NVKM_ENGINE_MSVLD : ptr0 = 0x0270; break; in gf100_ectx_bind() 184 nvkm_wo32(chan->inst, ptr0 + 0, lower_32_bits(addr)); in gf100_ectx_bind() 185 nvkm_wo32(chan->inst, ptr0 + 4, upper_32_bits(addr)); in gf100_ectx_bind()
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/openbmc/linux/arch/ia64/lib/ |
H A D | memset.S | 31 #define ptr0 r29 macro 161 stf8 [ptr0] = fvalue, 8 165 stf8 [ptr0] = fvalue, 24 169 stf8 [ptr0] = fvalue, 8 173 stf8 [ptr0] = fvalue, 24 177 stf8 [ptr0] = fvalue, 8 181 stf8 [ptr0] = fvalue, 24 185 stf8 [ptr0] = fvalue, 32 231 stf.spill [ptr0] = f0, 32 235 stf.spill [ptr0] = f0, 32 [all …]
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/openbmc/u-boot/board/ti/ks2_evm/ |
H A D | ddr3_k2g.c | 20 .ptr0 = 0x42C21590ul, 60 .ptr0 = 0x42C21590ul, 121 .ptr0 = 0x42C21590ul,
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H A D | ddr3_cfg.c | 18 .ptr0 = 0x42C21590ul,
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/openbmc/linux/tools/testing/radix-tree/ |
H A D | regression3.c | 32 void *ptr0 = (void *)4ul; in regression3_test() local 40 radix_tree_insert(&root, 0, ptr0); in regression3_test()
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/openbmc/u-boot/arch/arm/mach-keystone/include/mach/ |
H A D | ddr3.h | 18 unsigned int ptr0; member
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/openbmc/u-boot/board/imgtec/ci20/ |
H A D | ci20.c | 293 .ptr0 = 0x002000d4, 337 .ptr0 = 0x002000d4,
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/openbmc/linux/drivers/crypto/cavium/cpt/ |
H A D | request_manager.h | 84 __be64 ptr0; member
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H A D | cptvf_reqmanager.c | 80 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components() 100 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components()
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/openbmc/linux/drivers/crypto/marvell/octeontx2/ |
H A D | otx2_cpt_reqmgr.h | 154 __be64 ptr0; member
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H A D | otx2_cptvf_reqmgr.c | 119 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components() 138 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components()
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/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/ |
H A D | dram_sun8i_a33.h | 79 u32 ptr0; /* 0x44 */ member
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H A D | dram_sun8i_a83t.h | 79 u32 ptr0; /* 0x44 */ member
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H A D | dram_sun8i_a23.h | 170 u32 ptr0; /* 0x1c */ member
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H A D | dram_sun6i.h | 163 u32 ptr0; /* 0x18 */ member
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/openbmc/u-boot/drivers/ram/stm32mp1/ |
H A D | stm32mp1_ddr.h | 131 u32 ptr0; member
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H A D | stm32mp1_ddr_regs.h | 147 u32 ptr0; /* 0x18 R/W PHY Timing 0*/ member
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/openbmc/linux/drivers/crypto/marvell/octeontx/ |
H A D | otx_cptvf_reqmgr.h | 132 __be64 ptr0; member
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H A D | otx_cptvf_reqmgr.c | 131 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components() 150 sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr); in setup_sgio_components()
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/openbmc/u-boot/arch/arm/mach-keystone/ |
H A D | ddr3_spd.c | 24 debug_ddr_cfg("ptr0 0x%08X\n", ptr->ptr0); in dump_phy_config() 307 spd_cb->phy_cfg.ptr0 = ((spd->t_pllpd & 0x7ff) << 21) | in init_ddr3param()
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/openbmc/u-boot/arch/mips/mach-jz47xx/jz4780/ |
H A D | sdram.c | 79 writel(ddr_config->ptr0, ddr_phy_regs + DDRP_PTR0); in ddr_phy_init()
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/openbmc/u-boot/arch/mips/mach-jz47xx/include/mach/ |
H A D | jz4780_dram.h | 440 u32 ptr0; /* PHY Timing Register 0 */ member
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