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/openbmc/webui-vue/src/store/modules/HardwareStatus/
H A DProcessorStore.js7 processors: [], property in ProcessorStore.state
10 processors: (state) => state.processors,
14 state.processors = data.map((processor) => {
/openbmc/u-boot/board/freescale/mx6ullevk/
H A DREADME35 processors/arm-processors/i.mx-applications-processors/i.mx-6-processors/ \
/openbmc/u-boot/doc/
H A DREADME.ARC12 The DesignWare ARC processors are also extendable, allowing designers to add
15 Synopsys' ARC processors have been used by over 170 customers worldwide who
18 All DesignWare ARC processors utilize a 16-/32-bit ISA that provides excellent
27 https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases
H A DREADME.arm6432 4. Spin-table is used to wake up secondary processors. One location
34 for secondary processors. It must be ensured that the location is
38 of secondary processors to it and send event to wakeup secondary
39 processors.
/openbmc/webui-vue/src/views/HardwareStatus/Inventory/
H A DInventory.vue44 <table-processors ref="processors" />
131 id: 'processors',
132 dataRef: 'processors',
133 href: '#processors',
134 linkText: i18n.global.t('pageInventory.processors'),
184 'hardware-status-processors-complete',
H A DInventoryTableProcessors.vue2 <page-section :section-title="$t('pageInventory.processors')">
14 :total-number-of-cells="processors.length"
26 :items="processors"
253 : this.processors.length;
255 processors() {
256 return this.$store.getters['processors/processors'];
260 this.$store.dispatch('processors/getProcessorsInfo').finally(() => {
263 'hardware-status-processors-complete',
274 .dispatch('processors/updateIdentifyLedValue', {
/openbmc/u-boot/doc/device-tree-bindings/firmware/
H A Dti,sci.txt4 Texas Instrument's processors including those belonging to Keystone generation
5 of processors have separate hardware entity which is now responsible for the
12 on multiple processors including ones running Linux.
14 See http://processors.wiki.ti.com/index.php/TISCI for protocol definition.
/openbmc/openbmc/meta-arm/meta-arm-toolchain/
H A DREADME.md20 Cortex-R and Cortex-M processors.
28 software development on devices based on 64-bit Arm Cortex-A processors.
/openbmc/u-boot/board/ti/ks2_evm/
H A DREADME88 http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Getting_Started#
92 K2HK http://processors.wiki.ti.com/index.php/EVMK2H_Hardware_Setup
93 K2E http://processors.wiki.ti.com/index.php/EVMK2E_Hardware_Setup
94 K2L http://processors.wiki.ti.com/index.php/TCIEVMK2L_Hardware_Setup
95 K2G http://processors.wiki.ti.com/index.php/66AK2G02_GP_EVM_Hardware_Setup
102 configuration as instructed at http://processors.wiki.ti.com/index.php/
150 http://processors.wiki.ti.com/index.php/*_Hardware_Setup.
170 http://processors.wiki.ti.com/index.php/*_Hardware_Setup.
190 http://processors.wiki.ti.com/index.php/66AK2G02_GP_EVM_Hardware_Setup
/openbmc/openbmc/meta-openpower/recipes-phosphor/configuration/
H A Dentity-manager_%.bbappend3 # Systems with IBM processors tend to use IBM-formatted VPD, so fru-device
/openbmc/u-boot/doc/device-tree-bindings/mailbox/
H A Dnvidia,tegra186-hsp.txt3 The HSP modules are used for the processors to share resources and communicate
7 two processors not in an SMP relationship.
/openbmc/openbmc/meta-openpower/recipes-bsp/pdbg/
H A Dpdbg_3.6.bb2 DESCRIPTION = "pdbg allows JTAG-like debugging of the host POWER processors"
/openbmc/openbmc/meta-raspberrypi/recipes-bsp/bootfiles/
H A Drpi-cmdline.bb30 # Add a request to isolate processors from the Linux scheduler. ISOLATED_CPUS
33 # not specify ALL processors simultaneously
/openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-kernel/linux/files/corstone1000/
H A D0001-remoteproc-Add-Arm-remoteproc-driver.patch6 introduce remoteproc support for Arm remote processors
8 The supported remote processors are those that come with a reset
14 The driver can be extended to support other remote processors
17 The driver also supports control of multiple remote processors at the
60 + Say y here to support Arm remote processors via the remote
63 + The supported processors are those that come with a reset control register
65 + processors meeting these requirements.
H A D0003-dt-bindings-remoteproc-Add-Arm-remoteproc.patch34 + Some Arm heterogeneous System-On-Chips feature remote processors that can
38 + This document defines the bindings for these remote processors.
/openbmc/openbmc/poky/meta/conf/machine/include/arm/armv5/
H A Dtune-iwmmxt.inc2 # Please use tune-xscale for PXA255/PXA26x based processors.
/openbmc/u-boot/drivers/hwspinlock/
H A DKconfig22 various processors on the SoC.
/openbmc/u-boot/drivers/smem/
H A DKconfig22 processors in a Qualcomm platform.
/openbmc/openbmc/poky/meta/recipes-bsp/u-boot/
H A Du-boot-common.inc3 ARM, MIPS and several other processors, which can be installed in a boot \
/openbmc/u-boot/doc/device-tree-bindings/sysreset/
H A Dti,sci-sysreset.txt9 [1] http://processors.wiki.ti.com/index.php/TISCI
/openbmc/u-boot/drivers/w1/
H A DKconfig24 bool "Enable 1-wire controller on i.MX processors"
/openbmc/webui-vue/src/store/
H A Dindex.js65 processors: ProcessorStore, property in AnonymousClassb4283c500101.modules
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/imx-cst/
H A Dimx-cst_3.4.0.bb2 DESCRIPTION = "Code signing support that integrates the HABv4 and AHAB library for i.MX processors"
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-kernel/libpfm/
H A Dlibpfm4_4.13.0.bb4 provided by the Performance Monitoring Unit (PMU) of modern processors."
/openbmc/u-boot/board/synopsys/hsdk/
H A DREADME8 software development on the ARC HS3x family of processors.
14 …https://github.com/foss-for-synopsys-dwc-arc-processors/ARC-Development-Systems-Forum/wiki/docs/AR…
31 https://github.com/foss-for-synopsys-dwc-arc-processors/rff-ftdi-reset

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