Searched refs:plx_regbase (Results 1 – 2 of 2) sorted by relevance
136 void __iomem *plx_regbase; /* PLX configuration base address */ member348 writel(0x00, devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()388 value = readl(devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()391 writel(0x00, devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()403 devpriv->plx_regbase + PLX9052_INTCSR); in me2600_xilinx_download()450 devpriv->plx_regbase = pci_ioremap_bar(pcidev, 0); in me_auto_attach()451 if (!devpriv->plx_regbase) in me_auto_attach()518 if (devpriv->plx_regbase) in me_detach()519 iounmap(devpriv->plx_regbase); in me_detach()
153 unsigned long plx_regbase; member328 val = inl(devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()330 outl(val, devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()344 val = inl(devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()346 outl(val, devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()369 val = inl(devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()377 val = inl(devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()379 outl(val, devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()404 outl(0, devpriv->plx_regbase + PLX9052_INTCSR); in me4000_reset()1120 if (!devpriv->plx_regbase || !dev->iobase) in me4000_auto_attach()[all …]