Searched refs:pllx_base (Results 1 – 3 of 3) sorted by relevance
31 union pllx_base_reg pllx_base; in wb_start() local144 pllx_base.word = 0; in wb_start()168 pllx_base.divn = scratch3.pllx_base_divn; in wb_start()172 pllx_base.divp = scratch3.pllx_base_divp; in wb_start()175 pllx_base.bypass = 1; in wb_start()188 writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in wb_start()190 pllx_base.enable = 1; in wb_start()191 writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in wb_start()192 pllx_base.bypass = 0; in wb_start()193 writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in wb_start()
124 u32 pllx_base; member943 tegra20_cpu_clk_sctx.pllx_base = in tegra20_cpu_clock_suspend()972 base != tegra20_cpu_clk_sctx.pllx_base) { in tegra20_cpu_clock_resume()976 writel(tegra20_cpu_clk_sctx.pllx_base, in tegra20_cpu_clock_resume()980 if (tegra20_cpu_clk_sctx.pllx_base & (1 << 30)) in tegra20_cpu_clock_resume()
142 u32 pllx_base; member1129 tegra30_cpu_clk_sctx.pllx_base = in tegra30_cpu_clock_suspend()1158 base != tegra30_cpu_clk_sctx.pllx_base) { in tegra30_cpu_clock_resume()1162 writel(tegra30_cpu_clk_sctx.pllx_base, in tegra30_cpu_clock_resume()1166 if (tegra30_cpu_clk_sctx.pllx_base & (1 << 30)) in tegra30_cpu_clock_resume()