Searched refs:pll_val (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/clk/ |
| H A D | clk-vt8500.c | 551 u32 pll_val; in vtwm_pll_set_rate() local
561 pll_val = VT8500_BITS_TO_VAL(mul, div1); in vtwm_pll_set_rate()
566 pll_val = WM8650_BITS_TO_VAL(mul, div1, div2); in vtwm_pll_set_rate()
571 pll_val = WM8750_BITS_TO_VAL(filter, mul, div1, div2); in vtwm_pll_set_rate()
576 pll_val = WM8850_BITS_TO_VAL(mul, div1, div2); in vtwm_pll_set_rate()
589 writel(pll_val, pll->reg); in vtwm_pll_set_rate()
640 u32 pll_val = readl(pll->reg); in vtwm_pll_recalc_rate() local
645 pll_freq = parent_rate * VT8500_PLL_MUL(pll_val); in vtwm_pll_recalc_rate()
646 pll_freq /= VT8500_PLL_DIV(pll_val); in vtwm_pll_recalc_rate()
649 pll_freq = parent_rate * WM8650_PLL_MUL(pll_val); in vtwm_pll_recalc_rate()
[all …]
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| /openbmc/u-boot/arch/arm/mach-imx/imx8m/ |
| H A D | clock.c | 574 void dram_pll_init(ulong pll_val) in dram_pll_init() argument
584 switch (pll_val) { in dram_pll_init()
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| /openbmc/u-boot/arch/arm/include/asm/arch-imx8m/ |
| H A D | clock.h | 653 void dram_pll_init(ulong pll_val);
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| /openbmc/linux/drivers/phy/cadence/ |
| H A D | phy-cadence-torrent.c | 1091 u32 pll_val; in cdns_torrent_dp_set_pll_en() local
1094 pll_val = cdns_torrent_dp_read(regmap, PHY_PMA_XCVR_PLLCLK_EN); in cdns_torrent_dp_set_pll_en()
1098 pll_val |= pll_bits; in cdns_torrent_dp_set_pll_en()
1102 pll_val &= (~pll_bits); in cdns_torrent_dp_set_pll_en()
1106 cdns_torrent_dp_write(regmap, PHY_PMA_XCVR_PLLCLK_EN, pll_val); in cdns_torrent_dp_set_pll_en()
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