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Searched refs:pll_ddr (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/include/hw/misc/
H A Dmchp_pfsoc_ioscb.h40 MemoryRegion pll_ddr; member
/openbmc/qemu/hw/misc/
H A Dmchp_pfsoc_ioscb.c251 memory_region_init_io(&s->pll_ddr, OBJECT(s), &mchp_pfsoc_pll_ops, s, in mchp_pfsoc_ioscb_realize()
253 memory_region_add_subregion(&s->container, IOSCB_PLL_DDR_BASE, &s->pll_ddr); in mchp_pfsoc_ioscb_realize()
/openbmc/u-boot/arch/arm/mach-imx/mx7/
H A Dclock.c155 reg = readl(&ccm_anatop->pll_ddr); in decode_pll()
344 reg = readl(&ccm_anatop->pll_ddr); in mxc_get_pll_ddr_derive()
/openbmc/u-boot/arch/arm/include/asm/arch-mx7/
H A Dcrm_regs.h90 uint32_t pll_ddr; /* offset 0x0070 */ member