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Searched refs:pll_ctrl (Results 1 – 11 of 11) sorted by relevance

/openbmc/u-boot/drivers/usb/host/
H A Dehci-vf.c62 void __iomem *pll_ctrl; in usb_power_config() local
66 pll_ctrl = &anadig->pll3_ctrl; in usb_power_config()
67 clrbits_le32(pll_ctrl, ANADIG_PLL3_CTRL_BYPASS); in usb_power_config()
68 setbits_le32(pll_ctrl, ANADIG_PLL3_CTRL_ENABLE in usb_power_config()
73 pll_ctrl = &anadig->pll7_ctrl; in usb_power_config()
74 clrbits_le32(pll_ctrl, ANADIG_PLL7_CTRL_BYPASS); in usb_power_config()
75 setbits_le32(pll_ctrl, ANADIG_PLL7_CTRL_ENABLE in usb_power_config()
/openbmc/u-boot/arch/m68k/include/asm/
H A Dimmap_5282.h89 typedef struct pll_ctrl { struct
H A Dimmap_520x.h176 typedef struct pll_ctrl { struct
H A Dimmap_5235.h206 typedef struct pll_ctrl { struct
H A Dimmap_5301x.h296 typedef struct pll_ctrl { struct
H A Dimmap_5275.h340 typedef struct pll_ctrl { struct
H A Dimmap_5329.h374 typedef struct pll_ctrl { struct
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddisplay.h178 u32 pll_ctrl; /* 0x208 */ member
/openbmc/u-boot/drivers/video/sunxi/
H A Dsunxi_display.c120 &hdmi->pll_ctrl); in sunxi_hdmi_hpd_detect()
772 writel(SUNXI_HDMI_PLL_CTRL, &hdmi->pll_ctrl);
776 clrsetbits_le32(&hdmi->pll_ctrl, SUNXI_HDMI_PLL_CTRL_DIV_MASK,
/openbmc/u-boot/arch/arm/dts/
H A Ddra7.dtsi1386 <0x4A096800 0x40>; /* pll_ctrl */
1387 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
1494 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
/openbmc/qemu/linux-user/
H A Dsyscall_defs.h721 abi_int pll_ctrl; member