Searched refs:pll_control_reg (Results 1 – 1 of 1) sorted by relevance
577 void __iomem *pll_control_reg = &ana_pll->dram_pll_cfg0; in dram_pll_init() local581 setbits_le32(pll_control_reg, SSCG_PLL_BYPASS1_MASK); in dram_pll_init()582 setbits_le32(pll_control_reg, SSCG_PLL_BYPASS2_MASK); in dram_pll_init()638 clrbits_le32(pll_control_reg, SSCG_PLL_PD_MASK); in dram_pll_init()640 setbits_le32(pll_control_reg, SSCG_PLL_DRAM_PLL_CLKE_MASK); in dram_pll_init()643 clrbits_le32(pll_control_reg, SSCG_PLL_BYPASS1_MASK); in dram_pll_init()645 clrbits_le32(pll_control_reg, SSCG_PLL_BYPASS2_MASK); in dram_pll_init()647 while (!(readl(pll_control_reg) & SSCG_PLL_LOCK_MASK)) in dram_pll_init()