Searched refs:pll_con5 (Results 1 – 1 of 1) sorted by relevance
| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-pll.c | 527 u32 mdiv, pdiv, sdiv, pll_con3, pll_con5; in samsung_pll0831x_recalc_rate()
532 pll_con5 = readl_relaxed(pll->con_reg + 8); in samsung_pll0831x_recalc_rate()
536 kdiv = (s16)((pll_con5 >> PLL0831X_KDIV_SHIFT) & PLL0831X_KDIV_MASK); in samsung_pll0831x_recalc_rate()
550 u32 pll_con3, pll_con5; in samsung_pll0831x_set_rate()
561 pll_con5 = readl_relaxed(pll->con_reg + 8); in samsung_pll0831x_set_rate()
570 pll_con5 &= ~(PLL0831X_KDIV_MASK << PLL0831X_KDIV_SHIFT); in samsung_pll0831x_set_rate()
575 pll_con5 |= ((u16)rate->kdiv << PLL0831X_KDIV_SHIFT); in samsung_pll0831x_set_rate()
582 writel_relaxed(pll_con5, pll->con_reg + 8); in samsung_pll0831x_set_rate()
522 u32 mdiv, pdiv, sdiv, pll_con3, pll_con5; samsung_pll0831x_recalc_rate() local
545 u32 pll_con3, pll_con5; samsung_pll0831x_set_rate() local
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