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Searched refs:pll_con0 (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/clk/samsung/
H A Dclk-pll.c332 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1; in samsung_pll36xx_recalc_rate() local
336 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll36xx_recalc_rate()
338 mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK; in samsung_pll36xx_recalc_rate()
339 pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK; in samsung_pll36xx_recalc_rate()
340 sdiv = (pll_con0 >> PLL36XX_SDIV_SHIFT) & PLL36XX_SDIV_MASK; in samsung_pll36xx_recalc_rate()
351 const struct samsung_pll_rate_table *rate, u32 pll_con0, u32 pll_con1) in samsung_pll36xx_mpk_change() argument
355 old_mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK; in samsung_pll36xx_mpk_change()
356 old_pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK; in samsung_pll36xx_mpk_change()
367 u32 pll_con0, pll_con1; in samsung_pll36xx_set_rate() local
377 pll_con0 = readl_relaxed(pll->con_reg); in samsung_pll36xx_set_rate()
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