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/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dclock_sun4i.c97 } pll1_para[] = { variable
126 while (pll1_para[i].freq > hz) in clock_set_pll1()
129 hz = pll1_para[i].freq; in clock_set_pll1()
169 writel(pll1_para[i].pll1_cfg, &ccm->pll1_cfg); in clock_set_pll1()