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Searched refs:pl310_data_latency_ctrl (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dmisc.c66 writel(0x10, &pl310->pl310_data_latency_ctrl); in v7_outer_cache_enable()
H A Dspl_gen5.c79 writel(0x121, &pl310->pl310_data_latency_ctrl); in socfpga_pl310_clear()
/openbmc/u-boot/arch/arm/mach-imx/
H A Dcache.c111 writel(0x132, &pl310->pl310_data_latency_ctrl); in v7_outer_cache_enable()
/openbmc/u-boot/arch/arm/include/asm/
H A Dpl310.h34 u32 pl310_data_latency_ctrl; member