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Searched refs:pl2 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/arch/x86/kernel/
H A Dhead32.c109 pl2_t pl2 = SET_PL2((unsigned long)*ptep | PDE_IDENT_ATTR); in init_map() local
112 **pl2p = pl2; in init_map()
115 *(*pl2p + ((PAGE_OFFSET >> PGDIR_SHIFT))) = pl2; in init_map()
/openbmc/qemu/target/hppa/
H A Dtrace-events11 …oid *ent, int access_id, int u, int pl2, int pl1, int type, int b, int d, int t) "env=%p ent=%p ac…
/openbmc/u-boot/drivers/clk/
H A Dclk_zynqmp.c142 pl0, pl1, pl2, pl3, enumerator
232 case pl2: in zynqmp_clk_get_register()
/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp-clk-ccf.dtsi96 "ams_ref", "pl0", "pl1", "pl2", "pl3", "wdt";
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c4702 const struct smu7_performance_level *pl2) in smu7_are_power_levels_equal() argument
4704 return ((pl1->memory_clock == pl2->memory_clock) && in smu7_are_power_levels_equal()
4705 (pl1->engine_clock == pl2->engine_clock) && in smu7_are_power_levels_equal()
4706 (pl1->pcie_gen == pl2->pcie_gen) && in smu7_are_power_levels_equal()
4707 (pl1->pcie_lane == pl2->pcie_lane)); in smu7_are_power_levels_equal()
H A Dvega10_hwmgr.c5018 const struct vega10_performance_level *pl2) in vega10_are_power_levels_equal() argument
5020 return ((pl1->soc_clock == pl2->soc_clock) && in vega10_are_power_levels_equal()
5021 (pl1->gfx_clock == pl2->gfx_clock) && in vega10_are_power_levels_equal()
5022 (pl1->mem_clock == pl2->mem_clock)); in vega10_are_power_levels_equal()