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Searched refs:phy_reg_def (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_phy.c63 struct bb_reg_definition *pPhyReg = &priv->phy_reg_def[eRFPath]; in _rtl92e_phy_rf_read()
110 struct bb_reg_definition *pPhyReg = &priv->phy_reg_def[eRFPath]; in _rtl92e_phy_rf_write()
304 priv->phy_reg_def[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
305 priv->phy_reg_def[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; in _rtl92e_init_bb_rf_reg_def()
307 priv->phy_reg_def[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; in _rtl92e_init_bb_rf_reg_def()
308 priv->phy_reg_def[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; in _rtl92e_init_bb_rf_reg_def()
310 priv->phy_reg_def[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; in _rtl92e_init_bb_rf_reg_def()
311 priv->phy_reg_def[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; in _rtl92e_init_bb_rf_reg_def()
313 priv->phy_reg_def[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; in _rtl92e_init_bb_rf_reg_def()
316 priv->phy_reg_def[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; in _rtl92e_init_bb_rf_reg_def()
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H A Dr8190P_rtl8256.c67 pPhyReg = &priv->phy_reg_def[eRFPath]; in rtl92e_config_rf()
H A Drtl_core.h206 struct bb_reg_definition phy_reg_def[4]; member