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Searched refs:phase2_power (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/hw/cxl/
H A Dcxl-component-utils.c436 wmask[offset + offsetof(CXLDVSECDeviceGPF, phase2_power)] = 0xFF; in cxl_component_create_dvsec()
437 wmask[offset + offsetof(CXLDVSECDeviceGPF, phase2_power) + 1] = 0xFF; in cxl_component_create_dvsec()
438 wmask[offset + offsetof(CXLDVSECDeviceGPF, phase2_power) + 2] = 0xFF; in cxl_component_create_dvsec()
439 wmask[offset + offsetof(CXLDVSECDeviceGPF, phase2_power) + 3] = 0xFF; in cxl_component_create_dvsec()
/openbmc/qemu/include/hw/cxl/
H A Dcxl_pci.h123 uint32_t phase2_power; member
/openbmc/qemu/hw/mem/
H A Dcxl_type3.c371 .phase2_power = 0x33, /* 0x33 miliwatts */ in build_dvsecs()