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Searched refs:pernandsdmmcclk (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h30 u32 pernandsdmmcclk; member
72 u32 pernandsdmmcclk; member
/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c177 writel(cfg->pernandsdmmcclk, in cm_basic_init()
178 &clock_manager_base->per_pll.pernandsdmmcclk); in cm_basic_init()
458 reg = readl(&clock_manager_base->per_pll.pernandsdmmcclk); in cm_get_mmc_controller_clk_hz()