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Searched refs:per_pll_pllglob (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_s10.c82 refclkdiv = (cfg->per_pll_pllglob >> CLKMGR_PLLGLOB_REFCLKDIV_OFFSET) & in cm_basic_init()
91 writel((cfg->per_pll_pllglob & ~CLKMGR_PLLGLOB_PD_MASK & in cm_basic_init()
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_s10.h60 u32 per_pll_pllglob; member