Searched refs:pdr0 (Results 1 – 7 of 7) sorted by relevance
71 if (pdr0 & MXC_CCM_PDR0_AUTO_CON) { in get_arm_div()89 if (pdr0 & MXC_CCM_PDR0_AUTO_CON) { in get_arm_div()100 static int get_ahb_div(u32 pdr0) in get_ahb_div() argument105 ((pdr0 & MXC_CCM_PDR0_CON_MUX_DIV_MASK) >> in get_ahb_div()145 u32 pdr0 = readl(&ccm->pdr0); in get_ipg_clk() local147 return freq / (get_ahb_div(pdr0) * 2); in get_ipg_clk()155 u32 pdr0 = readl(&ccm->pdr0); in get_ipg_per_clk() local158 if (pdr0 & MXC_CCM_PDR0_PER_SEL) { in get_ipg_per_clk()163 div = CCM_GET_DIVIDER(pdr0, in get_ipg_per_clk()166 div *= get_ahb_div(pdr0); in get_ipg_per_clk()[all …]
53 u32 pdr0 = readl(CCM_PDR0); in mx31_get_ipg_clk() local55 freq /= GET_PDR0_MAX_PODF(pdr0) + 1; in mx31_get_ipg_clk()56 freq /= GET_PDR0_IPG_PODF(pdr0) + 1; in mx31_get_ipg_clk()65 u32 pdr0 = readl(CCM_PDR0); in mx31_get_hsp_clk() local67 freq /= GET_PDR0_HSP_PODF(pdr0) + 1; in mx31_get_hsp_clk()
87 u32 pdr0, consumer_sel, hsp_sel; in _mx35_clocks_init() local94 pdr0 = __raw_readl(base + MXC_CCM_PDR0); in _mx35_clocks_init()95 consumer_sel = (pdr0 >> 16) & 0xf; in _mx35_clocks_init()123 hsp_sel = (pdr0 >> 20) & 0x3; in _mx35_clocks_init()
148 writel(0x00001000, &ccm->pdr0); in board_early_init_f()
210 u32 pdr0; /* Post divider 0 */ member
103 DEFINE(CLKCTL_PDR0, offsetof(struct ccm_regs, pdr0)); in main()
15 u32 pdr0; member