Searched refs:pd4 (Results 1 – 3 of 3) sorted by relevance
87 让我们考虑一个有12个CPU的平台，分成3个性能域，（pd0，pd4和pd8），按以下91 PDs: |--pd0--|--pd4--|---pd8---|95 每个根域包含6个CPU。这两个根域在上图中被表示为rd1和rd2。由于pd4与rd1和rd298 * rd1->pd: pd0 -> pd499 * rd2->pd: pd4 -> pd8101 请注意，调度器将为pd4创建两个重复的链表节点（每个链表中各一个）。然而这
100 (pd0, pd4 and pd8), organized as follows::103 PDs: |--pd0--|--pd4--|---pd8---|109 above figure. Since pd4 intersects with both rd1 and rd2, it will be112 * rd1->pd: pd0 -> pd4113 * rd2->pd: pd4 -> pd8116 pd4 (one for each list). However, both just hold a pointer to the same
112 u32 pd4; member619 d->pd4 = get_host_pd4_or_7(addr); in cppi41_dma_prep_slave_sg()