Searched refs:pciercx_cfg032 (Results 1 – 1 of 1) sorted by relevance
233 union cvmx_pciercx_cfg032 pciercx_cfg032; in __cvmx_pcie_build_config_addr() local240 pciercx_cfg032.u32 = in __cvmx_pcie_build_config_addr()242 if ((pciercx_cfg032.s.dlla == 0) || (pciercx_cfg032.s.lt == 1)) in __cvmx_pcie_build_config_addr()393 union cvmx_pciercx_cfg032 pciercx_cfg032; in __cvmx_pcie_rc_initialize_config_space() local501 pciercx_cfg032.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG032(pcie_port)); in __cvmx_pcie_rc_initialize_config_space()502 pciercx_cfg032.s.aslpc = 0; /* Active state Link PM control. */ in __cvmx_pcie_rc_initialize_config_space()503 cvmx_pcie_cfgx_write(pcie_port, CVMX_PCIERCX_CFG032(pcie_port), pciercx_cfg032.u32); in __cvmx_pcie_rc_initialize_config_space()595 union cvmx_pciercx_cfg032 pciercx_cfg032; in __cvmx_pcie_rc_initialize_link_gen1() local647 pciercx_cfg032.u32 = cvmx_pcie_cfgx_read(pcie_port, CVMX_PCIERCX_CFG032(pcie_port)); in __cvmx_pcie_rc_initialize_link_gen1()648 } while (pciercx_cfg032.s.dlla == 0); in __cvmx_pcie_rc_initialize_link_gen1()[all …]