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Searched refs:pcdr1 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/arm926ejs/mx27/
H A Dgeneric.c120 return imx_decode_perclk((readl(&pll->pcdr1) & 0x3f) + 1); in imx_get_perclk1()
127 return imx_decode_perclk(((readl(&pll->pcdr1) >> 8) & 0x3f) + 1); in imx_get_perclk2()
134 return imx_decode_perclk(((readl(&pll->pcdr1) >> 16) & 0x3f) + 1); in imx_get_perclk3()
141 return imx_decode_perclk(((readl(&pll->pcdr1) >> 24) & 0x3f) + 1); in imx_get_perclk4()
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_pmc.h58 u32 pcdr1; /* 0x104 Periperial Clock Disable Register 1 */ member
/openbmc/u-boot/arch/arm/lib/
H A Dasm-offsets.c84 DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1)); in main()
/openbmc/u-boot/arch/arm/include/asm/arch-mx27/
H A Dimx-regs.h122 u32 pcdr1; /* Peripheral Clock Divider Register 1 */ member