Searched refs:output_hz (Results 1 – 7 of 7) sorted by relevance
| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3036.c | 52 uint output_hz = vco_hz / div->postdiv1 / div->postdiv2; in rkclk_set_pll() local
57 div->postdiv2, vco_hz, output_hz); in rkclk_set_pll()
59 output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ); in rkclk_set_pll()
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| H A D | clk_rk322x.c | 49 uint output_hz = vco_hz / div->postdiv1 / div->postdiv2; in rkclk_set_pll() local
53 div->postdiv2, vco_hz, output_hz); in rkclk_set_pll()
55 output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ); in rkclk_set_pll()
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| H A D | clk_rk3188.c | 92 uint output_hz = vco_hz / div->no; in rkclk_set_pll() local
95 (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
97 output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ && in rkclk_set_pll()
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| H A D | clk_rk3128.c | 46 uint output_hz = vco_hz / div->postdiv1 / div->postdiv2; in rkclk_set_pll() local
50 div->postdiv2, vco_hz, output_hz); in rkclk_set_pll()
52 output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ); in rkclk_set_pll()
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| H A D | clk_rv1108.c | 73 uint output_hz = vco_hz / div->postdiv1 / div->postdiv2; in rkclk_set_pll() local
77 div->postdiv2, vco_hz, output_hz); in rkclk_set_pll()
79 output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ); in rkclk_set_pll()
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| H A D | clk_rk3288.c | 151 uint output_hz = vco_hz / div->no; in rkclk_set_pll() local
154 (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
156 output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ && in rkclk_set_pll()
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| H A D | clk_rk3368.c | 94 uint output_hz = vco_hz / div->no; in rkclk_set_pll() local
97 pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
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