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Searched refs:op2 (Results 1 – 25 of 75) sorted by relevance

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/openbmc/qemu/tests/tcg/s390x/
H A Dshift.c6 static uint64_t _name(uint64_t op1, uint64_t op2, uint64_t *cc) \
15 : [op2] "r" (op2) \
26 static uint64_t _insn ## _ ## _offset(uint64_t op1, uint64_t op2, \
42 : [op2] "r" (op2) \
74 uint64_t op2; member
84 .op2 = 0x62e5508ccb4c99fdull,
92 .op2 = 0x5ffcf7465f5cd71full,
100 .op2 = 0x3ddf2f53347d3030ull,
108 .op2 = 0x18d586fab239cbeeull,
116 .op2 = 0x4d193b85bb5cb39bull,
[all …]
H A Dexrl-trt.c7 char op2[256]; in main() local
15 op2[i] = 0xaa; in main()
17 op2[i] = 0; in main()
30 [op2] "Q" (op2) in main()
H A Dexrl-trtr.c7 char op2[256]; in main() local
15 op2[i] = 0xbb; in main()
17 op2[i] = 0; in main()
30 [op2] "Q" (op2) in main()
H A Dlaalg.c11 unsigned long cc = 0, op1, op2 = 40, op3 = 2; in main() local
18 , [op2] "+T" (op2) in main()
24 assert(op2 == 42); in main()
H A Dcsst.c13 uint64_t op2 = 0; in main() local
23 [op2] "+m" (op2), in main()
38 if (op2 != parmlist[2]) { in main()
H A Dipm.c7 uint32_t op2 = 0x44444444; in main() local
15 [op2] "r" (&op2) in main()
H A Dclm.S9 clm %r0,6,op2
22 op2: label
H A Dicm.S9 icm %r0,10,op2
23 op2: label
/openbmc/qemu/target/alpha/
H A Dint_helper.c90 uint64_t helper_minub8(uint64_t op1, uint64_t op2) in helper_minub8() argument
98 opb = op2 >> (i * 8); in helper_minub8()
105 uint64_t helper_minsb8(uint64_t op1, uint64_t op2) in helper_minsb8() argument
114 opb = op2 >> (i * 8); in helper_minsb8()
121 uint64_t helper_minuw4(uint64_t op1, uint64_t op2) in helper_minuw4() argument
129 opb = op2 >> (i * 16); in helper_minuw4()
136 uint64_t helper_minsw4(uint64_t op1, uint64_t op2) in helper_minsw4() argument
145 opb = op2 >> (i * 16); in helper_minsw4()
152 uint64_t helper_maxub8(uint64_t op1, uint64_t op2) in helper_maxub8() argument
160 opb = op2 >> (i * 8); in helper_maxub8()
[all …]
/openbmc/qemu/target/arm/hvf/
H A Dtrace-events1 hvf_unhandled_sysreg_read(uint64_t pc, uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2) "unhandled sysreg read at pc=0x%"PRIx64": 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d)"
2 hvf_unhandled_sysreg_write(uint64_t pc, uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2) "unhandled sysreg write at pc=0x%"PRIx64": 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d)"
7 hvf_sysreg_read(uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2, uint64_t val) "sysreg read 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d) = 0x%016"PRIx64
8 hvf_sysreg_write(uint32_t reg, uint32_t op0, uint32_t op1, uint32_t crn, uint32_t crm, uint32_t op2, uint64_t val) "sysreg write 0x%08x (op0=%d op1=%d crn=%d crm=%d op2=%d, val=0x%016"PRIx64")"
/openbmc/u-boot/post/lib_powerpc/
H A Dcmp.c27 extern void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2);
33 ulong op2; member
100 cpu_post_exec_12 (code, & res, test->op1, test->op2); in cpu_post_test_cmp()
H A Dthreex.c27 ulong op2);
34 ulong op2; member
177 cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2); in cpu_post_test_threex()
189 cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2); in cpu_post_test_threex()
H A Drlwimi.c24 ulong op2);
32 uchar op2; member
75 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), in cpu_post_test_rlwimi()
94 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me) | in cpu_post_test_rlwimi()
H A Drlwnm.c24 ulong op2);
31 ulong op2; member
113 cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2); in cpu_post_test_rlwnm()
125 cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2); in cpu_post_test_rlwnm()
H A Dthree.c27 ulong op2);
34 ulong op2; member
207 cpu_post_exec_22 (code, & cr, & res, test->op1, test->op2); in cpu_post_test_three()
219 cpu_post_exec_22 (codecr, & cr, & res, test->op1, test->op2); in cpu_post_test_three()
H A Dsrawi.c30 uchar op2; member
72 ASM_11S(test->cmd, reg1, reg0, test->op2), in cpu_post_test_srawi()
89 ASM_11S(test->cmd, reg1, reg0, test->op2) | BIT_C, in cpu_post_test_srawi()
H A Dcmpi.c33 ushort op2; member
94 ASM_1IC(test->cmd, test->cr, 3, test->op2), in cpu_post_test_cmpi()
H A Drlwinm.c30 uchar op2; member
70 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), in cpu_post_test_rlwinm()
87 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, in cpu_post_test_rlwinm()
H A Dstring.c24 extern void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2);
25 extern void cpu_post_exec_04 (ulong *code, ulong op1, ulong op2, ulong op3,
H A Dcr.c38 extern void cpu_post_exec_21x (ulong *code, ulong *op1, ulong *op2, ulong op3);
89 ulong op2; member
313 ASM_12F(test->cmd, test->op3, test->op1, test->op2), in cpu_post_test_cr()
/openbmc/u-boot/drivers/bios_emulator/x86emu/
H A Dops2.c58 u8 op2) in x86emuOp2_illegal_op() argument
64 M.x86.R_CS, M.x86.R_IP-2,op2); in x86emuOp2_illegal_op()
145 void x86emuOp2_long_jump(u8 op2) in x86emuOp2_long_jump() argument
152 cond = x86emu_check_jump_condition(op2 & 0xF); in x86emuOp2_long_jump()
167 void x86emuOp2_set_byte(u8 op2) in x86emuOp2_set_byte() argument
176 switch (op2) { in x86emuOp2_set_byte()
263 void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2)) in x86emuOp2_push_FS() argument
277 void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2)) in x86emuOp2_pop_FS() argument
291 void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2)) in x86emuOp2_bt_R() argument
354 void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2)) in x86emuOp2_shld_IMM() argument
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dvec_helper.c1184 static uint16_t float16_ceq(float16 op1, float16 op2, float_status *stat) in float16_ceq() argument
1186 return -float16_eq_quiet(op1, op2, stat); in float16_ceq()
1189 static uint32_t float32_ceq(float32 op1, float32 op2, float_status *stat) in float32_ceq() argument
1191 return -float32_eq_quiet(op1, op2, stat); in float32_ceq()
1194 static uint64_t float64_ceq(float64 op1, float64 op2, float_status *stat) in float64_ceq() argument
1196 return -float64_eq_quiet(op1, op2, stat); in float64_ceq()
1199 static uint16_t float16_cge(float16 op1, float16 op2, float_status *stat) in float16_cge() argument
1201 return -float16_le(op2, op1, stat); in float16_cge()
1204 static uint32_t float32_cge(float32 op1, float32 op2, float_status *stat) in float32_cge() argument
1206 return -float32_le(op2, op1, stat); in float32_cge()
[all …]
/openbmc/qemu/target/hexagon/idef-parser/
H A Dparser-helpers.c517 HexValue *op2) in gen_bin_cmp() argument
520 HexValue op2_m = *op2; in gen_bin_cmp()
562 HexValue *op2, in gen_simple_op() argument
572 op2->signedness); in gen_simple_op()
575 " = ", op1, imm_imm, op2, ";\n"); in gen_simple_op()
579 "(", res, ", ", op2, ", ", op1, ");\n"); in gen_simple_op()
583 "(", res, ", ", op1, ", ", op2, ");\n"); in gen_simple_op()
587 "(", res, ", ", op1, ", ", op2, ");\n"); in gen_simple_op()
595 HexValue *op2) in gen_sub_op() argument
601 op2 in gen_sub_op()
624 gen_asl_op(Context * c,YYLTYPE * locp,unsigned bit_width,bool op_is64bit,const char * bit_suffix,HexValue * res,enum OpTypes op_types,HexValue * op1,HexValue * op2) gen_asl_op() argument
676 gen_asr_op(Context * c,YYLTYPE * locp,unsigned bit_width,bool op_is64bit,const char * bit_suffix,HexValue * res,enum OpTypes op_types,HexValue * op1,HexValue * op2) gen_asr_op() argument
731 gen_lsr_op(Context * c,YYLTYPE * locp,unsigned bit_width,bool op_is64bit,const char * bit_suffix,HexValue * res,enum OpTypes op_types,HexValue * op1,HexValue * op2) gen_lsr_op() argument
777 gen_andl_op(Context * c,YYLTYPE * locp,unsigned bit_width,const char * bit_suffix,HexValue * res,enum OpTypes op_types,HexValue * op1,HexValue * op2) gen_andl_op() argument
802 gen_minmax_op(Context * c,YYLTYPE * locp,unsigned bit_width,HexValue * res,enum OpTypes op_types,HexValue * op1,HexValue * op2,bool minmax) gen_minmax_op() argument
845 gen_bin_op(Context * c,YYLTYPE * locp,OpType type,HexValue * op1,HexValue * op2) gen_bin_op() argument
1610 gen_carry_from_add(Context * c,YYLTYPE * locp,HexValue * op1,HexValue * op2,HexValue * op3) gen_carry_from_add() argument
1634 gen_addsat64(Context * c,YYLTYPE * locp,HexValue * dst,HexValue * op1,HexValue * op2) gen_addsat64() argument
1871 gen_rvalue_mpy(Context * c,YYLTYPE * locp,HexMpy * mpy,HexValue * op1,HexValue * op2) gen_rvalue_mpy() argument
[all...]
/openbmc/qemu/target/arm/
H A Dcpu-sysregs.h14 #define ENCODE_ID_REG(op0, op1, crn, crm, op2) \ argument
19 ((op2) << CP_REG_ARM64_SYSREG_OP2_SHIFT))
/openbmc/qemu/target/tricore/
H A Dtranslate.c450 void(*op2)(TCGv_i32, TCGv_i32, TCGv_i32)) in gen_addsub64_h()
467 (*op2)(temp3, r1_high, r3); in gen_addsub64_h()
471 if (op2 == tcg_gen_add_tl) { in gen_addsub64_h()
2650 void(*op2)(TCGv_i32, TCGv_i32, TCGv_i32)) in gen_bit_1op()
2661 (*op2)(temp1 , ret, temp1); in gen_accumulating_cond()
3513 uint32_t op2; in decode_sr_accu()
3514 op2 = MASK_OP_SR_OP2(ctx->opcode); in decode_sr_accu()
3516 switch (op2) { in decode_sr_accu()
3520 gen_compute_branch(ctx, op2, 0, 0, 0, 0); in decode_sr_accu()
3539 uint32_t op2; in decode_sr_accu()
3480 uint32_t op2; decode_sr_system() local
3506 uint32_t op2; decode_sr_accu() local
3782 int32_t op2; decode_abs_ldw() local
3815 int32_t op2; decode_abs_ldb() local
3846 int32_t op2; decode_abs_ldst_swap() local
3871 uint32_t op2; decode_abs_ldst_context() local
3897 int32_t op2; decode_abs_store() local
3930 int32_t op2; decode_abs_storeb_h() local
3957 uint32_t op2; decode_bit_andacc() local
3998 uint32_t op2; decode_bit_logical_t() local
4032 uint32_t op2; decode_bit_insert() local
4054 uint32_t op2; decode_bit_logical_t2() local
4090 uint32_t op2; decode_bit_orand() local
4131 uint32_t op2; decode_bit_sh_logic1() local
4171 uint32_t op2; decode_bit_sh_logic2() local
4214 uint32_t op2; decode_bo_addrmode_post_pre_base() local
4368 uint32_t op2; decode_bo_addrmode_bitreverse_circular() local
4475 uint32_t op2; decode_bo_addrmode_ld_post_pre_base() local
4607 uint32_t op2; decode_bo_addrmode_ld_bitreverse_circular() local
4721 uint32_t op2; decode_bo_addrmode_stctx_post_pre_base() local
4810 uint32_t op2; decode_bo_addrmode_ldmst_bitreverse_circular() local
4949 uint32_t op2; decode_rc_logical_shift() local
5023 uint32_t op2; decode_rc_accumulator() local
5222 uint32_t op2; decode_rc_serviceroutine() local
5246 uint32_t op2; decode_rc_mul() local
5284 uint32_t op2; decode_rcpw_insert() local
5325 uint32_t op2; decode_rcrw_insert() local
5367 uint32_t op2; decode_rcr_cond_select() local
5407 uint32_t op2; decode_rcr_madd() local
5462 uint32_t op2; decode_rcr_msub() local
5575 uint32_t op2; decode_rr_accumulator() local
5918 uint32_t op2; decode_rr_logical_shift() local
5992 uint32_t op2, n; decode_rr_address() local
6058 uint32_t op2; decode_rr_idirect() local
6089 uint32_t op2; decode_rr_divide() local
6313 uint32_t op2; decode_rr1_mul() local
6417 uint32_t op2; decode_rr1_mulq() local
6487 uint32_t op2; decode_rr2_mul() local
6524 uint32_t op2; decode_rrpw_extract_insert() local
6579 uint32_t op2; decode_rrr_cond_select() local
6623 uint32_t op2; decode_rrr_divide() local
6711 uint32_t op2; decode_rrr2_madd() local
6763 uint32_t op2; decode_rrr2_msub() local
6817 uint32_t op2; decode_rrr1_madd() local
6963 uint32_t op2; decode_rrr1_maddq_h() local
7141 uint32_t op2; decode_rrr1_maddsu_h() local
7299 uint32_t op2; decode_rrr1_msub() local
7445 uint32_t op2; decode_rrr1_msubq_h() local
7623 uint32_t op2; decode_rrr1_msubad_h() local
7782 uint32_t op2; decode_rrrr_extract_insert() local
7845 uint32_t op2; decode_rrrw_extract_insert() local
7901 uint32_t op2; decode_sys_interrupts() local
8009 int op1, op2; decode_32Bit_opc() local
[all...]

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