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Searched refs:omap3_dpll4_set_rate_and_parent (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/clk/ti/
H A Dclock.h290 int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate,
H A Ddpll.c134 .set_rate_and_parent = &omap3_dpll4_set_rate_and_parent,
H A Ddpll3xxx.c1038 int omap3_dpll4_set_rate_and_parent(struct clk_hw *hw, unsigned long rate, in omap3_dpll4_set_rate_and_parent() function