Searched refs:o64 (Results 1 – 6 of 6) sorted by relevance
/openbmc/qemu/linux-user/hppa/ |
H A D | cpu_loop.c | 83 uint64_t o64, n64, r64; in hppa_lws() local 84 o64 = *(uint64_t *)g2h(cs, old); in hppa_lws() 88 o64, n64); in hppa_lws() 89 ret = r64 != o64; in hppa_lws() 94 if (r64 == o64) { in hppa_lws()
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/openbmc/linux/tools/arch/x86/lib/ |
H A D | x86-opcode-map.txt | 109 40: INC eAX (i64) | REX (o64) 110 41: INC eCX (i64) | REX.B (o64) 111 42: INC eDX (i64) | REX.X (o64) 112 43: INC eBX (i64) | REX.XB (o64) 113 44: INC eSP (i64) | REX.R (o64) 114 45: INC eBP (i64) | REX.RB (o64) 115 46: INC eSI (i64) | REX.RX (o64) 117 48: DEC eAX (i64) | REX.W (o64) 118 49: DEC eCX (i64) | REX.WB (o64) 332 05: SYSCALL (o64) [all …]
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/openbmc/linux/arch/x86/lib/ |
H A D | x86-opcode-map.txt | 109 40: INC eAX (i64) | REX (o64) 110 41: INC eCX (i64) | REX.B (o64) 111 42: INC eDX (i64) | REX.X (o64) 112 43: INC eBX (i64) | REX.XB (o64) 113 44: INC eSP (i64) | REX.R (o64) 114 45: INC eBP (i64) | REX.RB (o64) 115 46: INC eSI (i64) | REX.RX (o64) 117 48: DEC eAX (i64) | REX.W (o64) 118 49: DEC eCX (i64) | REX.WB (o64) 332 05: SYSCALL (o64) [all …]
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/openbmc/qemu/target/i386/tcg/ |
H A D | decode-new.c.inc | 275 [0] = X86_OP_ENTRYw(RDxxBASE, R,y, cpuid(FSGSBASE) chk(o64) p_f3), 276 [1] = X86_OP_ENTRYw(RDxxBASE, R,y, cpuid(FSGSBASE) chk(o64) p_f3), 277 [2] = X86_OP_ENTRYr(WRxxBASE, R,y, cpuid(FSGSBASE) chk(o64) p_f3 zextT0), 278 [3] = X86_OP_ENTRYr(WRxxBASE, R,y, cpuid(FSGSBASE) chk(o64) p_f3 zextT0), 662 [0xe0] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66), 663 [0xe1] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66), 664 [0xe2] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66), 665 [0xe3] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66), 666 [0xe4] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66), 667 [0xe5] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66), [all …]
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/openbmc/qemu/target/arm/tcg/ |
H A D | translate.c | 3333 TCGv_i64 o64 = tcg_temp_new_i64(); in gen_store_exclusive() local 3353 tcg_gen_atomic_cmpxchg_i64(o64, taddr, cpu_exclusive_val, n64, in gen_store_exclusive() 3356 tcg_gen_setcond_i64(TCG_COND_NE, o64, o64, cpu_exclusive_val); in gen_store_exclusive() 3357 tcg_gen_extrl_i64_i32(t0, o64); in gen_store_exclusive()
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-devtools/ltrace/ltrace/ |
H A D | 0001-Add-support-for-mips64-n32-n64.patch | 802 + the order: o32, n32, n64, o64
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