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Searched refs:nvic (Results 1 – 15 of 15) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dm_helper.c290 armv7m_nvic_set_pending_derived(env->nvic, exc, exc_secure); in v7m_stack_write()
293 armv7m_nvic_set_pending_lazyfp(env->nvic, exc, exc_secure); in v7m_stack_write()
355 armv7m_nvic_set_pending(env->nvic, exc, exc_secure); in v7m_stack_read()
430 armv7m_nvic_can_take_pending_exception(env->nvic); in HELPER()
805 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, in v7m_push_callee_stack()
963 armv7m_nvic_acknowledge_irq(env->nvic); in v7m_exception_taken()
988 NVICState *nvic = env->nvic; in v7m_update_fpccr() local
1232 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, in v7m_push_stack()
1606 if (armv7m_nvic_can_take_pending_exception(env->nvic)) { in do_v7m_exception_exit()
1951 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, in do_v7m_function_return()
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H A Dcpu-v7m.c36 && (armv7m_nvic_can_take_pending_exception(env->nvic))) { in arm_v7m_cpu_exec_interrupt()
/openbmc/linux/arch/arm/boot/dts/
H A Darmv7-m.dtsi3 nvic: interrupt-controller@e000e100 { label
4 compatible = "arm,armv7m-nvic";
20 interrupt-parent = <&nvic>;
/openbmc/u-boot/arch/arm/dts/
H A Darmv7-m.dtsi4 nvic: interrupt-controller@e000e100 { label
5 compatible = "arm,armv7m-nvic";
21 interrupt-parent = <&nvic>;
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,nvic.txt10 "arm,v6m-nvic"
11 "arm,v7m-nvic"
12 "arm,v8m-nvic"
30 compatible = "arm,v7m-nvic";
/openbmc/qemu/hw/arm/
H A Darmv7m.c258 object_initialize_child(obj, "nvic", &s->nvic, TYPE_NVIC); in armv7m_instance_init()
260 OBJECT(&s->nvic), "num-irq"); in armv7m_instance_init()
262 OBJECT(&s->nvic), "num-prio-bits"); in armv7m_instance_init()
361 s->cpu->env.nvic = &s->nvic; in armv7m_realize()
362 s->nvic.cpu = s->cpu; in armv7m_realize()
369 if (!sysbus_realize(SYS_BUS_DEVICE(&s->nvic), errp)) { in armv7m_realize()
377 qdev_pass_gpios(DEVICE(&s->nvic), dev, NULL); in armv7m_realize()
378 qdev_pass_gpios(DEVICE(&s->nvic), dev, "SYSRESETREQ"); in armv7m_realize()
379 qdev_pass_gpios(DEVICE(&s->nvic), dev, "NMI"); in armv7m_realize()
433 sbd = SYS_BUS_DEVICE(&s->nvic); in armv7m_realize()
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H A Dstellaris.c1035 DeviceState *gpio_dev[7], *nvic; in stellaris_init() local
1099 nvic = qdev_new(TYPE_ARMV7M); in stellaris_init()
1101 qdev_prop_set_uint32(nvic, "num-irq", NUM_IRQ_LINES); in stellaris_init()
1102 qdev_prop_set_uint8(nvic, "num-prio-bits", NUM_PRIO_BITS); in stellaris_init()
1103 qdev_prop_set_string(nvic, "cpu-type", ms->cpu_type); in stellaris_init()
1104 qdev_prop_set_bit(nvic, "enable-bitband", true); in stellaris_init()
1105 qdev_connect_clock_in(nvic, "cpuclk", in stellaris_init()
1108 object_property_set_link(OBJECT(nvic), "memory", in stellaris_init()
1158 qdev_get_gpio_in(nvic, 18)); in stellaris_init()
1176 qdev_get_gpio_in(nvic, 8)); in stellaris_init()
[all …]
/openbmc/qemu/include/hw/arm/
H A Darmv7m.h69 NVICState nvic; member
/openbmc/linux/arch/arm/boot/dts/nxp/vf/
H A Dvf610m4.dtsi56 interrupt-parent = <&nvic>;
/openbmc/linux/arch/arm/boot/dts/arm/
H A Dmps2-an385.dts72 interrupt-parent = <&nvic>;
H A Dmps2-an399.dts72 interrupt-parent = <&nvic>;
/openbmc/linux/drivers/irqchip/
H A DMakefile39 obj-$(CONFIG_ARM_NVIC) += irq-nvic.o
/openbmc/qemu/hw/intc/
H A Darmv7m_nvic.c2724 NVICState *nvic = NVIC(obj); in armv7m_nvic_instance_init() local
2727 sysbus_init_irq(sbd, &nvic->excpout); in armv7m_nvic_instance_init()
2728 qdev_init_gpio_out_named(dev, &nvic->sysresetreq, "SYSRESETREQ", 1); in armv7m_nvic_instance_init()
/openbmc/qemu/target/arm/
H A Dcpu.c2018 if (!env->nvic) { in arm_cpu_realizefn()
2023 if (env->nvic) { in arm_cpu_realizefn()
H A Dcpu.h770 NVICState *nvic; member