Searched refs:num_ref_idx_l0_default_active_minus1 (Results 1 – 19 of 19) sorted by relevance
72 unsigned char num_ref_idx_l0_default_active_minus1; member
100 unsigned char num_ref_idx_l0_default_active_minus1; member481 GET_HEVC_VDEC_PARAM(num_ref_idx_l0_default_active_minus1); in vdec_hevc_copy_pps_params()493 GET_HEVC_VDEC_PARAM(num_ref_idx_l0_default_active_minus1); in vdec_hevc_copy_pps_params()
124 GET_MTK_VDEC_PARAM(num_ref_idx_l0_default_active_minus1); in mtk_vdec_h264_copy_pps_params()
176 unsigned int num_ref_idx_l0_default_active_minus1; member
274 unsigned int num_ref_idx_l0_default_active_minus1; member
320 rbsp_uev(rbsp, &pps->num_ref_idx_l0_default_active_minus1); in nal_h264_rbsp_pps()
441 rbsp_uev(rbsp, &pps->num_ref_idx_l0_default_active_minus1); in nal_hevc_rbsp_pps()
1691 pps->num_ref_idx_l0_default_active_minus1 = channel->num_ref_idx_l0 - 1; in allegro_h264_write_pps()
104 G1_REG_DEC_CTRL6_REFIDX0_ACTIVE(pps->num_ref_idx_l0_default_active_minus1 + 1) | in set_params()
283 VDPU_REG_REFIDX0_ACTIVE(pps->num_ref_idx_l0_default_active_minus1 + 1) | in set_params()
294 pps->num_ref_idx_l0_default_active_minus1 + 1); in set_params()
89 __entry->p.num_ref_idx_l0_default_active_minus1,
103 __entry->p.num_ref_idx_l0_default_active_minus1,
1455 __u8 num_ref_idx_l0_default_active_minus1; member2255 __u8 num_ref_idx_l0_default_active_minus1; member
909 h264->num_ref_idx_l0_active_minus1 = h->pps->num_ref_idx_l0_default_active_minus1; in tegra_vde_h264_setup_context()
697 WRITE_PPS(pps->num_ref_idx_l0_default_active_minus1, in assemble_hw_pps()
201 - ``num_ref_idx_l0_default_active_minus1``368 set to the value of num_ref_idx_l0_default_active_minus12241 - ``num_ref_idx_l0_default_active_minus1``
943 if (p_h264_pps->num_ref_idx_l0_default_active_minus1 > in std_validate_compound()
678 + __u8 num_ref_idx_l0_default_active_minus1;938 + __u8 num_ref_idx_l0_default_active_minus1;1304 + * @num_ref_idx_l0_default_active_minus1: this value plus 1 specifies the1336 + __u8 num_ref_idx_l0_default_active_minus1;