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/openbmc/u-boot/arch/arm/mach-omap2/am33xx/
H A Dddr.c38 static inline u32 get_mr(int nr, u32 cs, u32 mr_addr) in get_mr() argument
43 writel(mr_addr, &emif_reg[nr]->emif_lpddr2_mode_reg_cfg); in get_mr()
45 mr = readl(&emif_reg[nr]->emif_lpddr2_mode_reg_data); in get_mr()
55 static inline void set_mr(int nr, u32 cs, u32 mr_addr, u32 mr_val) in set_mr() argument
58 writel(mr_addr, &emif_reg[nr]->emif_lpddr2_mode_reg_cfg); in set_mr()
59 writel(mr_val, &emif_reg[nr]->emif_lpddr2_mode_reg_data); in set_mr()
62 static void configure_mr(int nr, u32 cs) in configure_mr() argument
66 while (get_mr(nr, cs, LPDDR2_MR0) & LPDDR2_MR0_DAI_MASK) in configure_mr()
68 set_mr(nr, cs, LPDDR2_MR10, 0x56); in configure_mr()
70 set_mr(nr, cs, LPDDR2_MR1, 0x43); in configure_mr()
[all …]
H A Demif4.c51 static void config_vtp(int nr) in config_vtp() argument
53 writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_ENABLE, in config_vtp()
54 &vtpreg[nr]->vtp0ctrlreg); in config_vtp()
55 writel(readl(&vtpreg[nr]->vtp0ctrlreg) & (~VTP_CTRL_START_EN), in config_vtp()
56 &vtpreg[nr]->vtp0ctrlreg); in config_vtp()
57 writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_START_EN, in config_vtp()
58 &vtpreg[nr]->vtp0ctrlreg); in config_vtp()
61 while ((readl(&vtpreg[nr]->vtp0ctrlreg) & VTP_CTRL_READY) != in config_vtp()
72 const struct emif_regs *regs, int nr) in config_ddr() argument
75 config_vtp(nr); in config_ddr()
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/openbmc/u-boot/arch/microblaze/include/asm/
H A Dbitops.h36 static inline void set_bit(int nr, volatile void *addr) in set_bit() argument
42 a += nr >> 5; in set_bit()
43 mask = 1 << (nr & 0x1f); in set_bit()
49 static inline void __set_bit(int nr, volatile void *addr) in __set_bit() argument
54 a += nr >> 5; in __set_bit()
55 mask = 1 << (nr & 0x1f); in __set_bit()
66 static inline void clear_bit(int nr, volatile void *addr) in clear_bit() argument
72 a += nr >> 5; in clear_bit()
73 mask = 1 << (nr & 0x1f); in clear_bit()
79 #define __clear_bit(nr, addr) clear_bit(nr, addr) argument
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/openbmc/u-boot/arch/mips/include/asm/
H A Dbitops.h65 set_bit(int nr, volatile void *addr) in set_bit() argument
67 unsigned long *m = ((unsigned long *) addr) + (nr >> 5); in set_bit()
76 : "ir" (1UL << (nr & 0x1f)), "m" (*m)); in set_bit()
88 static __inline__ void __set_bit(int nr, volatile void * addr) in __set_bit() argument
90 unsigned long * m = ((unsigned long *) addr) + (nr >> 5); in __set_bit()
92 *m |= 1UL << (nr & 31); in __set_bit()
107 clear_bit(int nr, volatile void *addr) in clear_bit() argument
109 unsigned long *m = ((unsigned long *) addr) + (nr >> 5); in clear_bit()
118 : "ir" (~(1UL << (nr & 0x1f))), "m" (*m)); in clear_bit()
131 change_bit(int nr, volatile void *addr) in change_bit() argument
[all …]
/openbmc/u-boot/arch/nds32/include/asm/
H A Dbitops.h35 extern void set_bit(int nr, void *addr);
37 static inline void __set_bit(int nr, void *addr) in __set_bit() argument
42 a += nr >> 5; in __set_bit()
43 mask = 1 << (nr & 0x1f); in __set_bit()
49 extern void clear_bit(int nr, void *addr);
51 static inline void __clear_bit(int nr, void *addr) in __clear_bit() argument
57 a += nr >> 5; in __clear_bit()
58 mask = 1 << (nr & 0x1f); in __clear_bit()
66 extern void change_bit(int nr, void *addr);
68 static inline void __change_bit(int nr, void *addr) in __change_bit() argument
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/openbmc/u-boot/include/
H A Dsh_pfc.h143 #define PORT_DATA_I(nr) \ argument
144 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
146 #define PORT_DATA_I_PD(nr) \ argument
147 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
148 PORT##nr##_IN, PORT##nr##_IN_PD)
150 #define PORT_DATA_I_PU(nr) \ argument
151 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
152 PORT##nr##_IN, PORT##nr##_IN_PU)
154 #define PORT_DATA_I_PU_PD(nr) \ argument
155 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
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/openbmc/u-boot/arch/sandbox/include/asm/
H A Dbitops.h37 extern void set_bit(int nr, void *addr);
39 extern void clear_bit(int nr, void *addr);
41 extern void change_bit(int nr, void *addr);
43 static inline void __change_bit(int nr, void *addr) in __change_bit() argument
45 unsigned long mask = BIT_MASK(nr); in __change_bit()
46 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __change_bit()
51 static inline int __test_and_set_bit(int nr, void *addr) in __test_and_set_bit() argument
53 unsigned long mask = BIT_MASK(nr); in __test_and_set_bit()
54 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __test_and_set_bit()
61 static inline int test_and_set_bit(int nr, void *addr) in test_and_set_bit() argument
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/openbmc/u-boot/arch/x86/include/asm/
H A Dbitops.h39 static __inline__ void set_bit(int nr, volatile void * addr) in set_bit() argument
44 :"Ir" (nr)); in set_bit()
56 static __inline__ void __set_bit(int nr, volatile void * addr) in __set_bit() argument
61 :"Ir" (nr)); in __set_bit()
76 static __inline__ void clear_bit(int nr, volatile void * addr) in clear_bit() argument
81 :"Ir" (nr)); in clear_bit()
95 static __inline__ void __change_bit(int nr, volatile void * addr) in __change_bit() argument
100 :"Ir" (nr)); in __change_bit()
112 static __inline__ void change_bit(int nr, volatile void * addr) in change_bit() argument
117 :"Ir" (nr)); in change_bit()
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/openbmc/qemu/include/qemu/
H A Dbitops.h21 #define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) argument
22 #define BITS_TO_U32S(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(uint32_t)) argument
24 #define BIT(nr) (1UL << (nr)) argument
25 #define BIT_ULL(nr) (1ULL << (nr)) argument
59 #define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) argument
60 #define BIT_WORD(nr) ((nr) / BITS_PER_LONG) argument
67 static inline void set_bit(long nr, unsigned long *addr) in set_bit() argument
69 unsigned long mask = BIT_MASK(nr); in set_bit()
70 unsigned long *p = addr + BIT_WORD(nr); in set_bit()
80 static inline void set_bit_atomic(long nr, unsigned long *addr) in set_bit_atomic() argument
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/openbmc/u-boot/arch/riscv/include/asm/
H A Dbitops.h35 static inline void __set_bit(int nr, void *addr) in __set_bit() argument
40 a += nr >> 5; in __set_bit()
41 mask = 1 << (nr & 0x1f); in __set_bit()
47 static inline void __clear_bit(int nr, void *addr) in __clear_bit() argument
52 a += nr >> 5; in __clear_bit()
53 mask = 1 << (nr & 0x1f); in __clear_bit()
59 static inline void __change_bit(int nr, void *addr) in __change_bit() argument
64 ADDR += nr >> 5; in __change_bit()
65 mask = 1 << (nr & 31); in __change_bit()
69 static inline int __test_and_set_bit(int nr, void *addr) in __test_and_set_bit() argument
[all …]
/openbmc/u-boot/arch/nios2/include/asm/bitops/
H A Dnon-atomic.h15 static inline void __set_bit(int nr, volatile unsigned long *addr) in __set_bit() argument
17 unsigned long mask = BIT_MASK(nr); in __set_bit()
18 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __set_bit()
25 static inline void __clear_bit(int nr, volatile unsigned long *addr) in __clear_bit() argument
27 unsigned long mask = BIT_MASK(nr); in __clear_bit()
28 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __clear_bit()
44 static inline void __change_bit(int nr, volatile unsigned long *addr) in __change_bit() argument
46 unsigned long mask = BIT_MASK(nr); in __change_bit()
47 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __change_bit()
61 static inline int __test_and_set_bit(int nr, volatile unsigned long *addr) in __test_and_set_bit() argument
[all …]
H A Datomic.h65 static inline void set_bit(int nr, volatile unsigned long *addr) in set_bit() argument
67 unsigned long mask = BIT_MASK(nr); in set_bit()
68 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in set_bit()
86 static inline void clear_bit(int nr, volatile unsigned long *addr) in clear_bit() argument
88 unsigned long mask = BIT_MASK(nr); in clear_bit()
89 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in clear_bit()
107 static inline void change_bit(int nr, volatile unsigned long *addr) in change_bit() argument
109 unsigned long mask = BIT_MASK(nr); in change_bit()
110 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in change_bit()
127 static inline int test_and_set_bit(int nr, volatile unsigned long *addr) in test_and_set_bit() argument
[all …]
/openbmc/u-boot/arch/arm/include/asm/
H A Dbitops.h30 extern void set_bit(int nr, volatile void * addr);
32 extern void clear_bit(int nr, volatile void * addr);
34 extern void change_bit(int nr, volatile void * addr);
36 static inline void __change_bit(int nr, volatile void *addr) in __change_bit() argument
38 unsigned long mask = BIT_MASK(nr); in __change_bit()
39 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __change_bit()
44 static inline int __test_and_set_bit(int nr, volatile void *addr) in __test_and_set_bit() argument
46 unsigned long mask = BIT_MASK(nr); in __test_and_set_bit()
47 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in __test_and_set_bit()
54 static inline int test_and_set_bit(int nr, volatile void * addr) in test_and_set_bit() argument
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/openbmc/u-boot/include/asm-generic/
H A Dioctl.h65 #define _IOC(dir,type,nr,size) \ argument
68 ((nr) << _IOC_NRSHIFT) | \
83 #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) argument
84 #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size))) argument
85 #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) argument
86 #define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) argument
87 #define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) argument
88 #define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) argument
89 #define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) argument
92 #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) argument
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/openbmc/u-boot/arch/powerpc/include/asm/
H A Dbitops.h31 static __inline__ void set_bit(int nr, volatile void * addr) in set_bit() argument
34 unsigned long mask = 1 << (nr & 0x1f); in set_bit()
35 unsigned long *p = ((unsigned long *)addr) + (nr >> 5); in set_bit()
48 static __inline__ void clear_bit(int nr, volatile void *addr) in clear_bit() argument
51 unsigned long mask = 1 << (nr & 0x1f); in clear_bit()
52 unsigned long *p = ((unsigned long *)addr) + (nr >> 5); in clear_bit()
65 static __inline__ void change_bit(int nr, volatile void *addr) in change_bit() argument
68 unsigned long mask = 1 << (nr & 0x1f); in change_bit()
69 unsigned long *p = ((unsigned long *)addr) + (nr >> 5); in change_bit()
82 static __inline__ int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit() argument
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/openbmc/u-boot/include/linux/
H A Dbitops.h9 #define BIT(nr) (1UL << (nr)) argument
10 #define BIT_ULL(nr) (1ULL << (nr)) argument
11 #define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) argument
12 #define BIT_WORD(nr) ((nr) / BITS_PER_LONG) argument
13 #define BIT_ULL_MASK(nr) (1ULL << ((nr) % BITS_PER_LONG_LONG)) argument
14 #define BIT_ULL_WORD(nr) ((nr) / BITS_PER_LONG_LONG) argument
16 #define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long)) argument
191 static inline void generic_set_bit(int nr, volatile unsigned long *addr) in generic_set_bit() argument
193 unsigned long mask = BIT_MASK(nr); in generic_set_bit()
194 unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); in generic_set_bit()
[all …]
/openbmc/u-boot/arch/sh/include/asm/
H A Dbitops.h14 static inline void set_bit(int nr, volatile void * addr) in set_bit() argument
20 a += nr >> 5; in set_bit()
21 mask = 1 << (nr & 0x1f); in set_bit()
32 static inline void clear_bit(int nr, volatile void * addr) in clear_bit() argument
38 a += nr >> 5; in clear_bit()
39 mask = 1 << (nr & 0x1f); in clear_bit()
45 static inline void change_bit(int nr, volatile void * addr) in change_bit() argument
51 a += nr >> 5; in change_bit()
52 mask = 1 << (nr & 0x1f); in change_bit()
58 static inline int test_and_set_bit(int nr, volatile void * addr) in test_and_set_bit() argument
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/openbmc/qemu/util/
H A Dbitmap.c116 long nr = BITS_TO_LONGS(bits); in slow_bitmap_and() local
119 for (k = 0; k < nr; k++) { in slow_bitmap_and()
129 long nr = BITS_TO_LONGS(bits); in slow_bitmap_or() local
131 for (k = 0; k < nr; k++) { in slow_bitmap_or()
140 long nr = BITS_TO_LONGS(bits); in slow_bitmap_xor() local
142 for (k = 0; k < nr; k++) { in slow_bitmap_xor()
151 long nr = BITS_TO_LONGS(bits); in slow_bitmap_andnot() local
154 for (k = 0; k < nr; k++) { in slow_bitmap_andnot()
160 void bitmap_set(unsigned long *map, long start, long nr) in bitmap_set() argument
163 const long size = start + nr; in bitmap_set()
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/openbmc/u-boot/arch/m68k/include/asm/
H A Dbitops.h14 extern void set_bit(int nr, volatile void *addr);
15 extern void clear_bit(int nr, volatile void *addr);
16 extern void change_bit(int nr, volatile void *addr);
17 extern int test_and_clear_bit(int nr, volatile void *addr);
18 extern int test_and_change_bit(int nr, volatile void *addr);
23 static inline int test_bit(int nr, __const__ volatile void *addr) in test_bit() argument
27 return (p[nr >> 5] & (1UL << (nr & 31))) != 0; in test_bit()
30 static inline int test_and_set_bit(int nr, volatile void *vaddr) in test_and_set_bit() argument
34 volatile char *p = &((volatile char *)vaddr)[(nr^31) >> 3]; in test_and_set_bit()
37 : "di" (nr & 7), "m" (*p), "a" (p)); in test_and_set_bit()
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dmp.c32 int cpu_reset(u32 nr) in cpu_reset() argument
35 src->scr |= cpu_reset_mask[nr]; in cpu_reset()
39 int cpu_status(u32 nr) in cpu_status() argument
41 printf("core %d => %d\n", nr, !!(src->scr & cpu_ctrl_mask[nr])); in cpu_status()
45 int cpu_release(u32 nr, int argc, char *const argv[]) in cpu_release() argument
51 switch (nr) { in cpu_release()
66 src->scr |= cpu_ctrl_mask[nr]; in cpu_release()
81 int cpu_disable(u32 nr) in cpu_disable() argument
84 src->scr &= ~cpu_ctrl_mask[nr]; in cpu_disable()
/openbmc/u-boot/arch/xtensa/include/asm/
H A Dbitops.h16 static inline int test_bit(int nr, const void *addr) in test_bit() argument
18 return ((unsigned char *)addr)[nr >> 3] & (1u << (nr & 7)); in test_bit()
21 static inline int test_and_set_bit(int nr, volatile void *addr) in test_and_set_bit() argument
25 unsigned char mask = 1u << (nr & 7); in test_and_set_bit()
28 tmp = ((unsigned char *)addr)[nr >> 3]; in test_and_set_bit()
29 ((unsigned char *)addr)[nr >> 3] |= mask; in test_and_set_bit()
/openbmc/u-boot/arch/arm/mach-zynqmp/
H A Dmp.c48 int cpu_reset(u32 nr) in cpu_reset() argument
134 int cpu_disable(u32 nr) in cpu_disable() argument
136 if (nr >= ZYNQMP_CORE_APU0 && nr <= ZYNQMP_CORE_APU3) { in cpu_disable()
138 val |= 1 << nr; in cpu_disable()
147 int cpu_status(u32 nr) in cpu_status() argument
149 if (nr >= ZYNQMP_CORE_APU0 && nr <= ZYNQMP_CORE_APU3) { in cpu_status()
150 u32 addr_low = readl(((u8 *)&apu_base->rvbar_addr0_l) + nr * 8); in cpu_status()
152 nr * 8); in cpu_status()
154 val &= 1 << nr; in cpu_status()
156 nr, val ? "OFF" : "ON" , addr_high, addr_low); in cpu_status()
[all …]
/openbmc/u-boot/board/lego/ev3/
H A Dlegoev3.c116 u8 *nr; in get_board_serial() local
118 nr = (u8 *)&serialnr->low; in get_board_serial()
119 nr[0] = buf[5]; in get_board_serial()
120 nr[1] = buf[4]; in get_board_serial()
121 nr[2] = buf[3]; in get_board_serial()
122 nr[3] = buf[2]; in get_board_serial()
123 nr = (u8 *)&serialnr->high; in get_board_serial()
124 nr[0] = buf[1]; in get_board_serial()
125 nr[1] = buf[0]; in get_board_serial()
126 nr[2] = 0; in get_board_serial()
[all …]
/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dmp.c16 int cpu_reset(u32 nr) in cpu_reset() argument
26 int cpu_status(u32 nr) in cpu_status() argument
32 int cpu_disable(u32 nr) in cpu_disable() argument
37 switch (nr) { in cpu_disable()
45 printf("Invalid cpu number for disable %d\n", nr); in cpu_disable()
52 int is_core_disabled(int nr) { in is_core_disabled() argument
57 switch (nr) { in is_core_disabled()
63 printf("Invalid cpu number for disable %d\n", nr); in is_core_disabled()
69 int cpu_release(u32 nr, int argc, char * const argv[]) in cpu_release() argument
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dmp.c45 int cpu_reset(u32 nr) in cpu_reset() argument
48 out_be32(&pic->pir, 1 << nr); in cpu_reset()
56 int cpu_status(u32 nr) in cpu_status() argument
63 if (nr == id) { in cpu_status()
66 } else if (is_core_disabled(nr)) { in cpu_status()
69 table = (u32 *)&__spin_table + nr * NUM_BOOT_ENTRY; in cpu_status()
82 int cpu_disable(u32 nr) in cpu_disable() argument
86 setbits_be32(&gur->coredisrl, 1 << nr); in cpu_disable()
91 int is_core_disabled(int nr) { in is_core_disabled() argument
95 return (coredisrl & (1 << nr)); in is_core_disabled()
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