| /openbmc/linux/drivers/crypto/hisilicon/zip/ |
| H A D | zip_main.c | 626 u32 nfe, ce; in hisi_zip_hw_error_enable() local
635 nfe = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver); in hisi_zip_hw_error_enable()
639 writel(ce | nfe | HZIP_CORE_INT_RAS_FE_ENB_MASK, qm->io_base + HZIP_CORE_INT_SOURCE); in hisi_zip_hw_error_enable()
644 writel(nfe, qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB); in hisi_zip_hw_error_enable()
654 u32 nfe, ce; in hisi_zip_hw_error_disable() local
657 nfe = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver); in hisi_zip_hw_error_disable()
659 writel(ce | nfe | HZIP_CORE_INT_RAS_FE_ENB_MASK, qm->io_base + HZIP_CORE_INT_MASK_REG); in hisi_zip_hw_error_disable()
1071 u32 nfe; in hisi_zip_clear_hw_err_status() local
1074 nfe = hisi_qm_get_hw_info(qm, zip_basic_cap_info, ZIP_NFE_MASK_CAP, qm->cap_ver); in hisi_zip_clear_hw_err_status()
1075 writel(nfe, qm->io_base + HZIP_CORE_INT_RAS_NFE_ENB); in hisi_zip_clear_hw_err_status()
[all …]
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| /openbmc/linux/drivers/crypto/hisilicon/hpre/ |
| H A D | hpre_main.c | 739 u32 ce, nfe; in hpre_hw_error_disable() local
742 nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); in hpre_hw_error_disable()
745 writel(ce | nfe | HPRE_HAC_RAS_FE_ENABLE, qm->io_base + HPRE_INT_MASK); in hpre_hw_error_disable()
752 u32 ce, nfe, err_en; in hpre_hw_error_enable() local
755 nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); in hpre_hw_error_enable()
758 writel(ce | nfe | HPRE_HAC_RAS_FE_ENABLE, qm->io_base + HPRE_HAC_SOURCE_INT); in hpre_hw_error_enable()
762 writel(nfe, qm->io_base + HPRE_RAS_NFE_ENB); in hpre_hw_error_enable()
769 err_en = ce | nfe | HPRE_HAC_RAS_FE_ENABLE; in hpre_hw_error_enable()
1283 u32 nfe; in hpre_clear_hw_err_status() local
1286 nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver); in hpre_clear_hw_err_status()
[all …]
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| /openbmc/linux/drivers/crypto/hisilicon/sec2/ |
| H A D | sec_main.c | 656 u32 ce, nfe; in sec_hw_error_enable() local
665 nfe = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_NFE_MASK_CAP, qm->cap_ver); in sec_hw_error_enable()
668 writel(ce | nfe | SEC_RAS_FE_ENB_MSK, qm->io_base + SEC_CORE_INT_SOURCE); in sec_hw_error_enable()
673 writel(nfe, qm->io_base + SEC_RAS_NFE_REG); in sec_hw_error_enable()
679 writel(ce | nfe | SEC_RAS_FE_ENB_MSK, qm->io_base + SEC_CORE_INT_MASK); in sec_hw_error_enable()
1009 u32 nfe; in sec_clear_hw_err_status() local
1012 nfe = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_NFE_MASK_CAP, qm->cap_ver); in sec_clear_hw_err_status()
1013 writel(nfe, qm->io_base + SEC_RAS_NFE_REG); in sec_clear_hw_err_status()
1031 err_info->nfe = hisi_qm_get_hw_info(qm, sec_basic_info, SEC_QM_NFE_MASK_CAP, qm->cap_ver); in sec_err_info_init()
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| /openbmc/qemu/tests/tcg/cris/bare/ |
| H A D | check_subc.s | 2 # output: 1\n1\n1fffe\nfffffffe\ncc463bdb\nffff0001\n1\nfffe\nfedafffe\n78133bdb\nffffff01\n1\nfe\n…
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| H A D | check_addxc.s | 2 # output: 1\n1\n101\n10001\n100fe\n1fffe\nfffe\nfffe\nfffffffe\nfe\nfffffffe\n781344db\n781343db\n7…
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| H A D | check_addm.s | 2 # output: 1\n1\n1fffe\nfffffffe\ncc463bdb\nffff0001\n1\nfffe\nfedafffe\n78133bdb\nffffff01\n1\nfe\n…
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| H A D | check_subm.s | 2 # output: 1\n1\n1fffe\nfffffffe\ncc463bdb\nffff0001\n1\nfffe\nfedafffe\n78133bdb\nffffff01\n1\nfe\n…
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| H A D | check_addxr.s | 2 # output: 1\n1\n1fffe\nfffffffe\ncc463bdb\nffff0001\n1\nfffe\nfedafffe\n78133bdb\nffffff01\n1\nfe\n…
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| H A D | check_addxm.s | 2 # output: 1\n1\n101\n10001\n100fe\n1fffe\nfffe\nfffe\nfffffffe\nfe\nfffffffe\n781344db\n781343db\n7…
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| H A D | check_addr.s | 2 # output: 1\n1\n1fffe\nfffffffe\ncc463bdb\nffff0001\n1\nfffe\nfedafffe\n78133bdb\nffffff01\n1\nfe\n…
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| H A D | check_subr.s | 2 # output: 1\n1\n1fffe\nfffffffe\ncc463bdb\nffff0001\n1\nfffe\nfedafffe\n78133bdb\nffffff01\n1\nfe\n…
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| /openbmc/linux/include/linux/ |
| H A D | hisi_acc_qm.h | 237 u32 nfe; member
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| /openbmc/linux/drivers/crypto/hisilicon/ |
| H A D | qm.c | 1398 qm->error_mask = err_info->nfe | err_info->ce | err_info->fe; in qm_hw_error_cfg()
1405 writel(err_info->nfe, qm->io_base + QM_RAS_NFE_ENABLE); in qm_hw_error_cfg()
1507 writel(qm->err_info.nfe, qm->io_base + QM_RAS_NFE_ENABLE); in qm_hw_error_handle_v2()
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