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Searched refs:nand_clk (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dpxa3xx_nand.c424 unsigned long nand_clk = mvebu_get_nand_clock(); in pxa3xx_nand_set_timing() local
427 ndtr0 = NDTR0_tCH(ns2cycle(t->tCH, nand_clk)) | in pxa3xx_nand_set_timing()
428 NDTR0_tCS(ns2cycle(t->tCS, nand_clk)) | in pxa3xx_nand_set_timing()
429 NDTR0_tWH(ns2cycle(t->tWH, nand_clk)) | in pxa3xx_nand_set_timing()
430 NDTR0_tWP(ns2cycle(t->tWP, nand_clk)) | in pxa3xx_nand_set_timing()
431 NDTR0_tRH(ns2cycle(t->tRH, nand_clk)) | in pxa3xx_nand_set_timing()
432 NDTR0_tRP(ns2cycle(t->tRP, nand_clk)); in pxa3xx_nand_set_timing()
434 ndtr1 = NDTR1_tR(ns2cycle(t->tR, nand_clk)) | in pxa3xx_nand_set_timing()
435 NDTR1_tWHR(ns2cycle(t->tWHR, nand_clk)) | in pxa3xx_nand_set_timing()
436 NDTR1_tAR(ns2cycle(t->tAR, nand_clk)); in pxa3xx_nand_set_timing()
[all …]
/openbmc/linux/drivers/mtd/nand/raw/
H A Dmeson_nand.c165 struct clk *nand_clk; member
272 ret = clk_set_rate(nfc->nand_clk, meson_chip->clk_rate); in meson_nfc_select_chip()
1152 nfc->nand_clk = devm_clk_register(nfc->dev, &nfc->nand_divider.hw); in meson_nfc_clk_init()
1153 if (IS_ERR(nfc->nand_clk)) in meson_nfc_clk_init()
1154 return PTR_ERR(nfc->nand_clk); in meson_nfc_clk_init()
1172 ret = clk_prepare_enable(nfc->nand_clk); in meson_nfc_clk_init()
1178 ret = clk_set_rate(nfc->nand_clk, 24000000); in meson_nfc_clk_init()
1185 clk_disable_unprepare(nfc->nand_clk); in meson_nfc_clk_init()
1195 clk_disable_unprepare(nfc->nand_clk); in meson_nfc_disable_clk()
/openbmc/linux/drivers/clk/actions/
H A Dowl-s500.c397 static OWL_COMP_DIV(nand_clk, "nand_clk", nand_clk_mux_p,
460 &nand_clk.common,
521 [CLK_NAND] = &nand_clk.common.hw,
/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun8i-a23.c293 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
506 &nand_clk.common,
628 [CLK_NAND] = &nand_clk.common.hw,
H A Dccu-sun5i.c327 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
566 &nand_clk.common,
693 [CLK_NAND] = &nand_clk.common.hw,
827 [CLK_NAND] = &nand_clk.common.hw,
937 [CLK_NAND] = &nand_clk.common.hw,
H A Dccu-sun8i-a33.c307 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
540 &nand_clk.common,
669 [CLK_NAND] = &nand_clk.common.hw,
H A Dccu-sun8i-h3.c334 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
574 &nand_clk.common,
714 [CLK_NAND] = &nand_clk.common.hw,
836 [CLK_NAND] = &nand_clk.common.hw,
H A Dccu-sun8i-a83t.c393 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents,
649 &nand_clk.common,
754 [CLK_NAND] = &nand_clk.common.hw,
H A Dccu-sun50i-a64.c414 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
700 &nand_clk.common,
816 [CLK_NAND] = &nand_clk.common.hw,
H A Dccu-sun4i-a10.c451 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
953 &nand_clk.common,
1148 [CLK_NAND] = &nand_clk.common.hw,
1306 [CLK_NAND] = &nand_clk.common.hw,
H A Dccu-sun8i-r40.c491 static SUNXI_CCU_MP_WITH_MUX_GATE(nand_clk, "nand", mod0_default_parents, 0x080,
898 &nand_clk.common,
1101 [CLK_NAND] = &nand_clk.common.hw,
/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_arria10.dtsi398 nand_clk: nand_clk { label
676 clocks = <&nand_clk>;
H A Dsocfpga.dtsi479 nand_clk: nand_clk { label
750 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_arria10.dtsi391 nand_clk: nand_clk { label
680 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;
H A Dsocfpga.dtsi480 nand_clk: nand_clk { label
779 clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>;