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Searched refs:mxs_register_32 (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/drivers/gpio/
H A Dmxs_gpio.c58 struct mxs_register_32 *reg = in gpio_get_value()
59 (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset); in gpio_get_value()
68 struct mxs_register_32 *reg = in gpio_set_value()
69 (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset); in gpio_set_value()
81 struct mxs_register_32 *reg = in gpio_direction_input()
82 (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset); in gpio_direction_input()
93 struct mxs_register_32 *reg = in gpio_direction_output()
94 (struct mxs_register_32 *)(MXS_PINCTRL_BASE + offset); in gpio_direction_output()
/openbmc/u-boot/drivers/usb/host/
H A Dehci-mxs.c25 struct mxs_register_32 *pll;
36 (struct mxs_register_32 *)(MXS_CLKCTRL_BASE +
48 (struct mxs_register_32 *)(MXS_CLKCTRL_BASE +
60 struct mxs_register_32 *digctl_ctrl = in ehci_mxs_toggle_clock()
61 (struct mxs_register_32 *)HW_DIGCTL_CTRL; in ehci_mxs_toggle_clock()
65 pll_offset = offsetof(struct mxs_register_32, reg_set); in ehci_mxs_toggle_clock()
66 dig_offset = offsetof(struct mxs_register_32, reg_clr); in ehci_mxs_toggle_clock()
70 pll_offset = offsetof(struct mxs_register_32, reg_clr); in ehci_mxs_toggle_clock()
71 dig_offset = offsetof(struct mxs_register_32, reg_set); in ehci_mxs_toggle_clock()
/openbmc/u-boot/arch/arm/mach-imx/
H A Dmisc.c20 int mxs_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned in mxs_wait_mask_set()
32 int mxs_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned in mxs_wait_mask_clr()
44 int mxs_reset_block(struct mxs_register_32 *reg) in mxs_reset_block()
/openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Diomux.c33 struct mxs_register_32 *mxs_reg; in mxs_iomux_setup_pad()
60 mxs_reg = (struct mxs_register_32 *)(iomux_base + ofs); in mxs_iomux_setup_pad()
72 mxs_reg = (struct mxs_register_32 *)(iomux_base + ofs); in mxs_iomux_setup_pad()
H A Dclock.c208 (ssp * sizeof(struct mxs_register_32)); in mxs_set_sspclk()
257 (ssp * sizeof(struct mxs_register_32)); in mxs_get_sspclk()
H A Dspl_mem_init.c275 mxs_reset_block((struct mxs_register_32 *)MXS_EMI_BASE); in mx23_mem_init()
/openbmc/u-boot/arch/arm/include/asm/mach-imx/
H A Dregs-common.h54 struct mxs_register_32 { struct
67 struct mxs_register_32 name##_reg; \
H A Dsys_proto.h131 int mxs_reset_block(struct mxs_register_32 *reg);
132 int mxs_wait_mask_set(struct mxs_register_32 *reg, u32 mask, u32 timeout);
133 int mxs_wait_mask_clr(struct mxs_register_32 *reg, u32 mask, u32 timeout);
/openbmc/u-boot/drivers/video/
H A Dmxsfb.c150 mxs_reset_block((struct mxs_register_32 *)&regs->hw_lcdif_ctrl_reg); in lcdif_power_down()